[llvm] r284090 - [AArch64][RegisterBankInfo] Use static mapping for same bank G_BITCAST.
Quentin Colombet via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 12 17:12:04 PDT 2016
Author: qcolombet
Date: Wed Oct 12 19:12:04 2016
New Revision: 284090
URL: http://llvm.org/viewvc/llvm-project?rev=284090&view=rev
Log:
[AArch64][RegisterBankInfo] Use static mapping for same bank G_BITCAST.
NFC.
Modified:
llvm/trunk/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir
Modified: llvm/trunk/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64RegisterBankInfo.cpp?rev=284090&r1=284089&r2=284090&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64RegisterBankInfo.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64RegisterBankInfo.cpp Wed Oct 12 19:12:04 2016
@@ -378,6 +378,14 @@ AArch64RegisterBankInfo::getInstrMapping
case TargetOpcode::G_FMUL:
case TargetOpcode::G_FDIV:
return getSameKindOfOperandsMapping(MI);
+ case TargetOpcode::G_BITCAST: {
+ LLT DstTy = MRI.getType(MI.getOperand(0).getReg());
+ LLT SrcTy = MRI.getType(MI.getOperand(1).getReg());
+ // If we are on the same bank, we can use the "same kind" mapping.
+ if (DstTy.isVector() == SrcTy.isVector())
+ return getSameKindOfOperandsMapping(MI);
+ break;
+ }
default:
break;
}
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir?rev=284090&r1=284089&r2=284090&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir Wed Oct 12 19:12:04 2016
@@ -57,6 +57,15 @@
define void @ignoreTargetSpecificInst() { ret void }
define void @regBankSelected_property() { ret void }
+
+ define void @bitcast_s32_gpr() { ret void }
+ define void @bitcast_s32_fpr() { ret void }
+ define void @bitcast_s32_gpr_fpr() { ret void }
+ define void @bitcast_s32_fpr_gpr() { ret void }
+ define void @bitcast_s64_gpr() { ret void }
+ define void @bitcast_s64_fpr() { ret void }
+ define void @bitcast_s64_gpr_fpr() { ret void }
+ define void @bitcast_s64_fpr_gpr() { ret void }
...
---
@@ -395,3 +404,186 @@ regBankSelected: false
body: |
bb.0:
...
+
+---
+# CHECK-LABEL: name: bitcast_s32_gpr
+name: bitcast_s32_gpr
+legalized: true
+
+# CHECK: registers:
+# CHECK-NEXT: - { id: 0, class: gpr }
+# CHECK-NEXT: - { id: 1, class: gpr }
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+
+# CHECK: body:
+# CHECK: %0(s32) = COPY %w0
+# CHECK: %1(s32) = G_BITCAST %0
+body: |
+ bb.0:
+ liveins: %w0
+
+ %0(s32) = COPY %w0
+ %1(s32) = G_BITCAST %0
+...
+
+---
+# CHECK-LABEL: name: bitcast_s32_fpr
+name: bitcast_s32_fpr
+legalized: true
+
+# CHECK: registers:
+# CHECK-NEXT: - { id: 0, class: fpr }
+# CHECK-NEXT: - { id: 1, class: fpr }
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+
+# CHECK: body:
+# CHECK: %0(<2 x s16>) = COPY %s0
+# CHECK: %1(<2 x s16>) = G_BITCAST %0
+body: |
+ bb.0:
+ liveins: %s0
+
+ %0(<2 x s16>) = COPY %s0
+ %1(<2 x s16>) = G_BITCAST %0
+...
+
+---
+# CHECK-LABEL: name: bitcast_s32_gpr_fpr
+name: bitcast_s32_gpr_fpr
+legalized: true
+
+# CHECK: registers:
+# CHECK-NEXT: - { id: 0, class: gpr }
+# CHECK-NEXT: - { id: 1, class: fpr }
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+
+# CHECK: body:
+# CHECK: %0(s32) = COPY %w0
+# CHECK: %1(<2 x s16>) = G_BITCAST %0
+body: |
+ bb.0:
+ liveins: %w0
+
+ %0(s32) = COPY %w0
+ %1(<2 x s16>) = G_BITCAST %0
+...
+
+---
+# CHECK-LABEL: name: bitcast_s32_fpr_gpr
+name: bitcast_s32_fpr_gpr
+legalized: true
+
+# CHECK: registers:
+# CHECK-NEXT: - { id: 0, class: fpr }
+# CHECK-NEXT: - { id: 1, class: gpr }
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+
+# CHECK: body:
+# CHECK: %0(<2 x s16>) = COPY %s0
+# CHECK: %1(s32) = G_BITCAST %0
+body: |
+ bb.0:
+ liveins: %s0
+
+ %0(<2 x s16>) = COPY %s0
+ %1(s32) = G_BITCAST %0
+...
+
+---
+# CHECK-LABEL: name: bitcast_s64_gpr
+name: bitcast_s64_gpr
+legalized: true
+
+# CHECK: registers:
+# CHECK-NEXT: - { id: 0, class: gpr }
+# CHECK-NEXT: - { id: 1, class: gpr }
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+
+# CHECK: body:
+# CHECK: %0(s64) = COPY %x0
+# CHECK: %1(s64) = G_BITCAST %0
+body: |
+ bb.0:
+ liveins: %x0
+
+ %0(s64) = COPY %x0
+ %1(s64) = G_BITCAST %0
+...
+
+---
+# CHECK-LABEL: name: bitcast_s64_fpr
+name: bitcast_s64_fpr
+legalized: true
+
+# CHECK: registers:
+# CHECK-NEXT: - { id: 0, class: fpr }
+# CHECK-NEXT: - { id: 1, class: fpr }
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+
+# CHECK: body:
+# CHECK: %0(<2 x s32>) = COPY %d0
+# CHECK: %1(<2 x s32>) = G_BITCAST %0
+body: |
+ bb.0:
+ liveins: %d0
+
+ %0(<2 x s32>) = COPY %d0
+ %1(<2 x s32>) = G_BITCAST %0
+...
+
+---
+# CHECK-LABEL: name: bitcast_s64_gpr_fpr
+name: bitcast_s64_gpr_fpr
+legalized: true
+
+# CHECK: registers:
+# CHECK-NEXT: - { id: 0, class: gpr }
+# CHECK-NEXT: - { id: 1, class: fpr }
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+# CHECK: body:
+# CHECK: %0(s64) = COPY %x0
+# CHECK: %1(<2 x s32>) = G_BITCAST %0
+body: |
+ bb.0:
+ liveins: %x0
+
+ %0(s64) = COPY %x0
+ %1(<2 x s32>) = G_BITCAST %0
+...
+
+---
+# CHECK-LABEL: name: bitcast_s64_fpr_gpr
+name: bitcast_s64_fpr_gpr
+legalized: true
+
+# CHECK: registers:
+# CHECK-NEXT: - { id: 0, class: fpr }
+# CHECK-NEXT: - { id: 1, class: gpr }
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+
+# CHECK: body:
+# CHECK: %0(<2 x s32>) = COPY %d0
+# CHECK: %1(s64) = G_BITCAST %0
+body: |
+ bb.0:
+ liveins: %d0
+
+ %0(<2 x s32>) = COPY %d0
+ %1(s64) = G_BITCAST %0
+...
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