[PATCH] D21560: Relax the clearance calculating for breaking partial register dependency.

[Joerg Sonnenberger via llvm-commits]

On Tue, Jun 21, 2016 at 05:04:11PM +0000, Dehao Chen via llvm-commits wrote:
> LLVM assumes that large clearance will hide the partial register spill
> penalty. But in our experiment, 16 clearance is too small. As the
> inserted XOR is normally fairly cheap, we should have a higher
> clearance threshold to aggressively insert XORs that is necessary to
> break partial register dependency.

What's the code size impact here?

Joerg