[PATCH] D21540: AMDGPU: Define a schedule class for COPY.

[Matt Arsenault via llvm-commits]

arsenm added inline comments.

================
Comment at: lib/Target/AMDGPU/SISchedule.td:108
@@ -107,1 +107,3 @@
 
+def : InstRW<[WriteSALU], (instrs COPY)>;
+
----------------
copy should be either WriteSALU or WriteVALU, but both of these seem to just use SALU. Is there a way to change this depending on the instance of the instruction?


Repository:
  rL LLVM

http://reviews.llvm.org/D21540