[PATCH] D17000: [AArch64] Reduce number of callee-save save/restores.

Tim Northover via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 11 14:02:44 PST 2016


t.p.northover added inline comments.

================
Comment at: lib/Target/AArch64/AArch64FrameLowering.cpp:757
@@ +756,3 @@
+  RegPairInfo &LastPair = RegPairs.back();
+  assert(AFI->getCalleeSavedStackSize() % 8 == 0);
+  LastPair.Offset = AFI->getCalleeSavedStackSize() / 8;
----------------
gberry wrote:
> Not currently, no.  Maybe in a future change that combines the callee-save stack bump with the local variable stack bump.
I'm not sure that would be allowed. The AAPCS says "Additionally, at any point at which memory is accessed via SP, the hardware requires that SP mod 16 = 0. The stack must be quad-word aligned."

It's a bit more complicated than that (it's configurable via SCTLR), but I think we should force anyone who wants to weaken that to think very hard about it.

================
Comment at: lib/Target/AArch64/AArch64FrameLowering.cpp:1001
@@ +1000,3 @@
+      // store the pair.
+      if (Subtarget.isTargetMachO())
+        SavedRegs.set(UnspilledCSGPRPaired);
----------------
gberry wrote:
> Good catch.  I just recalculated NumRegsSpilled at the end here so SavedRegs is always the canonical representation.
Ah, neat!


http://reviews.llvm.org/D17000





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