[PATCH] D16434: Fix ARM load/store opt live reg computing

[Matthias Braun via llvm-commits]

MatzeB added a comment.

In http://reviews.llvm.org/D16434#333738, @weimingz wrote:

> In http://reviews.llvm.org/D16434#333667, @MatzeB wrote:
>
> > This patch looks like fixing a symptom rather than the root cause. Shouldn't BX_RET simply have an implicit use operand for LR? So this would rather need fixing where BX_RET is constructed.
>
>
> Yes, I tried to add a use in td file like:
>  let isReturn = 1, isTerminator = 1, isBarrier = 1, Uses = [LR] in {
>
>   def tBX_RET : tPseudoExpand<(outs), (ins pred:$p), 2, IIC_Br,
>                    [(ARMretflag)], (tBX LR, pred:$p)>, Sched<[WriteBr]>;
>   
>
> Then I got an error like "use of undefined register LR". Any suggestions?


I assume you removed LR from the callee saved register set, in that case it probably has to go into the live-in list in the start block.


Repository:
  rL LLVM

http://reviews.llvm.org/D16434