[PATCH] D14141: [1/4] SP and PC as shifted-reg operands are unpredictable in ARMv7 Thumb
Renato Golin via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 28 06:45:33 PDT 2015
rengolin accepted this revision.
rengolin added a comment.
This revision is now accepted and ready to land.
Thanks! LGTM.
http://reviews.llvm.org/D14141
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