[PATCH] D14141: [1/4] SP and PC as shifted-reg operands are unpredictable in ARMv7 Thumb

[Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL251516: [ARM] Allow SP in rGPR, starting from ARMv8 (authored by askrobov).

Changed prior to commit:
  http://reviews.llvm.org/D14141?vs=38653&id=38655#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D14141

Files:
  llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
  llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
  llvm/trunk/test/MC/ARM/basic-thumb2-instructions-v8.s
  llvm/trunk/test/MC/ARM/diagnostics.s
  llvm/trunk/test/MC/ARM/thumb-shift-encoding.s
  llvm/trunk/test/MC/ARM/thumb2-diagnostics.s
  llvm/trunk/test/MC/Disassembler/ARM/invalid-thumbv7.txt
  llvm/trunk/test/MC/Disassembler/ARM/thumb-v8.txt

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D14141.38655.patch
Type: text/x-patch
Size: 18258 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20151028/cd9f5047/attachment.bin>