[PATCH] D14141: [1/4] SP and PC as shifted-reg operands are unpredictable in ARMv7 Thumb

Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 28 07:01:03 PDT 2015


This revision was automatically updated to reflect the committed changes.
Closed by commit rL251516: [ARM] Allow SP in rGPR, starting from ARMv8 (authored by askrobov).

Changed prior to commit:
  http://reviews.llvm.org/D14141?vs=38653&id=38655#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D14141

Files:
  llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
  llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
  llvm/trunk/test/MC/ARM/basic-thumb2-instructions-v8.s
  llvm/trunk/test/MC/ARM/diagnostics.s
  llvm/trunk/test/MC/ARM/thumb-shift-encoding.s
  llvm/trunk/test/MC/ARM/thumb2-diagnostics.s
  llvm/trunk/test/MC/Disassembler/ARM/invalid-thumbv7.txt
  llvm/trunk/test/MC/Disassembler/ARM/thumb-v8.txt

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