[PATCH] D13593: [mips] wrong opcode for ll/sc instructions on mipsr6 when -integrated-as is used

[Daniel Sanders via llvm-commits]

dsanders added a subscriber: dsanders.
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dsanders added a comment.
This revision now requires changes to proceed.

The code change looks correct but the test needs a couple changes.


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Comment at: test/Object/Mips/at.ll:1-2
@@ +1,3 @@
+; RUN: llc %s   -march=mips64el -mcpu=mips64r6 < %s -filetype=obj -o - \
+; RUN:   | llvm-objdump -mattr=+mips64r6 -d - | grep sc
+
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This isn't an Object test, it's a CodeGen test and should be added to the appropriate test/CodeGen/Mips/*atomic*.ll.

The test can't distinguish the pre-R6 sc from the R6 sc. The patch needs to use FileCheck (http://llvm.org/docs/CommandGuide/FileCheck.html) instead of grep and should check the encoding to be sure the right instruction was used.

Also, please check for the correct ll, lld, and scd.


http://reviews.llvm.org/D13593