[PATCH] [LLVM - ARM/AArch64] Add ACLE special register intrinsics (10.1)

Luke Cheeseman luke.cheeseman at arm.com
Wed May 13 08:11:56 PDT 2015


Reduced the size of the main functions in this patch (the lowering of read and write register) by adding calls to some helper function to help reduce nesting and improve the clarity of the functions. Also, added some more tests.


http://reviews.llvm.org/D9699

Files:
  lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
  lib/Target/AArch64/AArch64ISelLowering.cpp
  lib/Target/ARM/ARMISelDAGToDAG.cpp
  lib/Target/ARM/ARMISelLowering.cpp
  lib/Target/ARM/ARMInstrInfo.td
  lib/Target/ARM/ARMInstrThumb2.td
  test/CodeGen/AArch64/arm64-named-reg-alloc.ll
  test/CodeGen/AArch64/arm64-named-reg-notareg.ll
  test/CodeGen/AArch64/special-reg.ll
  test/CodeGen/ARM/named-reg-alloc.ll
  test/CodeGen/ARM/named-reg-notareg.ll
  test/CodeGen/ARM/special-reg-acore.ll
  test/CodeGen/ARM/special-reg-mcore.ll
  test/CodeGen/ARM/special-reg.ll

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