[PATCH] ARMEB: Vector extend operations

[Konrad Anheim]

Hi James,

I agree, would you please provide the source code (.ll) of your example. 
I checked the following code:

   define void @vector_ext_8i8_to_8i16( <8 x i8>* %loadaddr, <8 x i16>* 
%storeaddr ) {
     %1 = load <8 x i8>* %loadaddr
     %2 = zext <8 x i8> %1 to <8 x i16>
     store <8 x i16> %2, <8 x i16>* %storeaddr
     ret void
   }

gives:

   vldr    d16, [r0]
   vrev64.8        d16, d16
   vmovl.u8        q8, d16
   vrev64.16       q8, q8
   vstmia  r1, {d16, d17}
   bx      lr


Cheers,
Conny