[PATCH] ARMEB: Vector extend operations

James Molloy james at jamesmolloy.co.uk
Mon Jun 16 08:21:13 PDT 2014


Hi Konrad,

I found that by inspection. I didn't use a testcase.

Cheers,

James


On 16 June 2014 16:15, Konrad Anheim <kanheim at a-bix.com> wrote:

> Hi James,
>
> I agree, would you please provide the source code (.ll) of your example. I
> checked the following code:
>
>   define void @vector_ext_8i8_to_8i16( <8 x i8>* %loadaddr, <8 x i16>*
> %storeaddr ) {
>     %1 = load <8 x i8>* %loadaddr
>     %2 = zext <8 x i8> %1 to <8 x i16>
>     store <8 x i16> %2, <8 x i16>* %storeaddr
>     ret void
>   }
>
> gives:
>
>   vldr    d16, [r0]
>   vrev64.8        d16, d16
>   vmovl.u8        q8, d16
>   vrev64.16       q8, q8
>   vstmia  r1, {d16, d17}
>   bx      lr
>
>
> Cheers,
> Conny
>
>
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