[llvm] r210998 - R600: Move / cleanup more leftover AMDIL stuff.

[Matt Arsenault]

On Jun 15, 2014, at 2:19 PM, Jan Vesely <jan.vesely at rutgers.edu> wrote:

> On Sun, 2014-06-15 at 20:23 +0000, Matt Arsenault wrote:
>> Author: arsenm
>> Date: Sun Jun 15 15:23:38 2014
>> New Revision: 210998
>> 
>> URL: http://llvm.org/viewvc/llvm-project?rev=210998&view=rev
>> Log:
>> R600: Move / cleanup more leftover AMDIL stuff.
>> 
>> Modified:
>>    llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp
>>    llvm/trunk/lib/Target/R600/AMDGPUISelLowering.h
>>    llvm/trunk/lib/Target/R600/AMDILISelLowering.cpp
>> 
>> Modified: llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp?rev=210998&r1=210997&r2=210998&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp (original)
>> +++ llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp Sun Jun 15 15:23:38 2014
>> @@ -348,6 +348,19 @@ MVT AMDGPUTargetLowering::getVectorIdxTy
>>   return MVT::i32;
>> }
>> 
>> +// The backend supports 32 and 64 bit floating point immediates.
>> +// FIXME: Why are we reporting vectors of FP immediates as legal?
>> +bool AMDGPUTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const {
>> +  EVT ScalarVT = VT.getScalarType();
>> +  return (ScalarVT == MVT::f32 || MVT::f64);
> 
> Shouldn't this be (ScalarVT == MVT::f32 || ScalarVT == MVT::f64); ?
> 

Yes, I will fix this
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