<html><head><meta http-equiv="Content-Type" content="text/html charset=us-ascii"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;"><br><div><div>On Jun 15, 2014, at 2:19 PM, Jan Vesely <<a href="mailto:jan.vesely@rutgers.edu">jan.vesely@rutgers.edu</a>> wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite"><div style="font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;">On Sun, 2014-06-15 at 20:23 +0000, Matt Arsenault wrote:<br><blockquote type="cite">Author: arsenm<br>Date: Sun Jun 15 15:23:38 2014<br>New Revision: 210998<br><br>URL: <a href="http://llvm.org/viewvc/llvm-project?rev=210998&view=rev">http://llvm.org/viewvc/llvm-project?rev=210998&view=rev</a><br>Log:<br>R600: Move / cleanup more leftover AMDIL stuff.<br><br>Modified:<br>   llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp<br>   llvm/trunk/lib/Target/R600/AMDGPUISelLowering.h<br>   llvm/trunk/lib/Target/R600/AMDILISelLowering.cpp<br><br>Modified: llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp?rev=210998&r1=210997&r2=210998&view=diff">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp?rev=210998&r1=210997&r2=210998&view=diff</a><br>==============================================================================<br>--- llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp (original)<br>+++ llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp Sun Jun 15 15:23:38 2014<br>@@ -348,6 +348,19 @@ MVT AMDGPUTargetLowering::getVectorIdxTy<br>  return MVT::i32;<br>}<br><br>+// The backend supports 32 and 64 bit floating point immediates.<br>+// FIXME: Why are we reporting vectors of FP immediates as legal?<br>+bool AMDGPUTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const {<br>+  EVT ScalarVT = VT.getScalarType();<br>+  return (ScalarVT == MVT::f32 || MVT::f64);<br></blockquote><br>Shouldn't this be (ScalarVT == MVT::f32 || ScalarVT == MVT::f64); ?<br><br></div></blockquote><div><br></div><div>Yes, I will fix this</div></div></body></html>