[PATCH] R600/SI: Cleanup parsing of register names.

[Christian König]

> +  // The low 7 bits encoding value is the register index, for both VGPRs and
> +  // SGPRs.
> +  unsigned RegIdx = MRI.getEncodingValue(reg) & 0x7;
That doesn't looks valid on first glance. For the low 7 bis you want a 
mask of 0x1F here, not 0x7.

Christian.

Am 14.04.2014 08:51, schrieb Matt Arsenault:
> Try to figure out the class and number of subregisters.
>
> http://reviews.llvm.org/D3367
>
> Files:
>    lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp
>    lib/Target/R600/InstPrinter/AMDGPUInstPrinter.h
>
>
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