[PATCH] Vselect improvements
Nadav Rotem
nrotem at apple.com
Mon Jun 3 13:52:52 PDT 2013
Hi Matt,
Can you attach the test cases to this patch and add the description ? It will make it easier for me to review it.
Thanks,
Nadav
On Jun 3, 2013, at 1:43 PM, Matt Arsenault <Matthew.Arsenault at amd.com> wrote:
> Remove PromoteVectorOp part
>
> Hi nadav,
>
> http://llvm-reviews.chandlerc.com/D903
>
> CHANGE SINCE LAST DIFF
> http://llvm-reviews.chandlerc.com/D903?vs=2217&id=2253#toc
>
> Files:
> lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
> lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
> lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
> lib/CodeGen/SelectionDAG/SelectionDAG.cpp
>
> Index: lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
> ===================================================================
> --- lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
> +++ lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
> @@ -3659,16 +3659,28 @@
> Tmp3 = Node->getOperand(2); // True
> Tmp4 = Node->getOperand(3); // False
> SDValue CC = Node->getOperand(4);
> + ISD::CondCode CCCode = cast<CondCodeSDNode>(CC)->get();
> + EVT LHSVT = Tmp1.getValueType();
> + EVT LSetCCType = getSetCCResultType(LHSVT);
> +
> + if (TLI.getCondCodeAction(CCCode, LSetCCType.getSimpleVT())
> + == TargetLowering::Legal) {
> + // The condition is legal, lets expand into setcc + [v]select.
> + Tmp1 = DAG.getSetCC(dl, LSetCCType, Tmp1, Tmp2, CCCode);
> + Tmp1 = DAG.getSelect(dl, Node->getValueType(0), Tmp1, Tmp3, Tmp4);
> + } else {
> + LegalizeSetCCCondCode(LSetCCType.getSimpleVT(),
> + Tmp1, Tmp2, CC, dl);
> + // The condition is illegal, but we have a valid convesions.
> + // Lets convert to SELECT_CC with a legal CC.
> + assert(!Tmp2.getNode() &&
> + "Can't legalize SELECT_CC with legal condition!");
>
> - LegalizeSetCCCondCode(getSetCCResultType(Tmp1.getValueType()),
> - Tmp1, Tmp2, CC, dl);
> + Tmp2 = DAG.getConstant(0, LHSVT);
> + Tmp1 = DAG.getSelectCC(dl, Tmp1, Tmp2,
> + Tmp3, Tmp4, ISD::SETNE);
> + }
>
> - assert(!Tmp2.getNode() && "Can't legalize SELECT_CC with legal condition!");
> - Tmp2 = DAG.getConstant(0, Tmp1.getValueType());
> - CC = DAG.getCondCode(ISD::SETNE);
> - Tmp1 = DAG.getNode(ISD::SELECT_CC, dl, Node->getValueType(0), Tmp1, Tmp2,
> - Tmp3, Tmp4, CC);
> - Results.push_back(Tmp1);
> break;
> }
> case ISD::BR_CC: {
> @@ -3826,8 +3838,15 @@
> case ISD::XOR: {
> unsigned ExtOp, TruncOp;
> if (OVT.isVector()) {
> - ExtOp = ISD::BITCAST;
> - TruncOp = ISD::BITCAST;
> + if (OVT.getSizeInBits() == NVT.getSizeInBits()) {
> + ExtOp = ISD::BITCAST;
> + TruncOp = ISD::BITCAST;
> + } else if (OVT.getVectorNumElements() == NVT.getVectorNumElements()) {
> + ExtOp = ISD::SIGN_EXTEND;
> + TruncOp = ISD::TRUNCATE;
> + } else {
> + llvm_unreachable("Cannot determine what operations to execute!");
> + }
> } else {
> assert(OVT.isInteger() && "Cannot promote logic operation");
> ExtOp = ISD::ANY_EXTEND;
> Index: lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
> ===================================================================
> --- lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
> +++ lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
> @@ -490,10 +490,10 @@
> SDValue Cond = N->getOperand(0);
> CL = CH = Cond;
> if (Cond.getValueType().isVector()) {
> - assert(Cond.getValueType().getVectorElementType() == MVT::i1 &&
> - "Condition legalized before result?");
> - unsigned NumElements = Cond.getValueType().getVectorNumElements();
> - EVT VCondTy = EVT::getVectorVT(*DAG.getContext(), MVT::i1, NumElements / 2);
> + EVT CondVT = Cond.getValueType();
> + unsigned NumElements = CondVT.getVectorNumElements();
> + EVT VCondTy = EVT::getVectorVT(*DAG.getContext(),
> + CondVT.getVectorElementType(), NumElements / 2);
> CL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VCondTy, Cond,
> DAG.getIntPtrConstant(0));
> CH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VCondTy, Cond,
> Index: lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
> ===================================================================
> --- lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
> +++ lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
> @@ -268,9 +268,13 @@
> case TargetLowering::ZeroOrNegativeOneBooleanContent:
> assert(VecBool == TargetLowering::UndefinedBooleanContent ||
> VecBool == TargetLowering::ZeroOrOneBooleanContent);
> - // Vector reads from a one, scalar from all ones so sign extend.
> - Cond = DAG.getNode(ISD::SIGN_EXTEND_INREG, SDLoc(N), CondVT,
> - Cond, DAG.getValueType(MVT::i1));
> +
> + if (CondVT.getScalarType() == MVT::i1) {
> + // Vector reads from a one, scalar from all ones so sign extend.
> + Cond = DAG.getNode(ISD::SIGN_EXTEND_INREG, SDLoc(N), CondVT,
> + Cond, DAG.getValueType(MVT::i1));
> + }
> +
> break;
> }
> }
> @@ -307,7 +311,8 @@
> SDLoc DL(N);
>
> // Turn it into a scalar SETCC.
> - return DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, N->getOperand(2));
> + return DAG.getNode(ISD::SETCC, DL, N->getValueType(0),
> + LHS, RHS, N->getOperand(2));
> }
>
> SDValue DAGTypeLegalizer::ScalarizeVecRes_UNDEF(SDNode *N) {
> @@ -334,7 +339,7 @@
> SDLoc DL(N);
>
> // Turn it into a scalar SETCC.
> - SDValue Res = DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS,
> + SDValue Res = DAG.getNode(ISD::SETCC, DL, NVT, LHS, RHS,
> N->getOperand(2));
> // Vectors may have a different boolean contents to scalars. Promote the
> // value appropriately.
> Index: lib/CodeGen/SelectionDAG/SelectionDAG.cpp
> ===================================================================
> --- lib/CodeGen/SelectionDAG/SelectionDAG.cpp
> +++ lib/CodeGen/SelectionDAG/SelectionDAG.cpp
> @@ -1766,6 +1766,8 @@
> return;
> }
> case ISD::SELECT:
> + assert(!Op.getOperand(0).getValueType().isVector() &&
> + "Should use ISD::VSELECT for vector select!");
> ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
> ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
> assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
> @@ -3290,6 +3292,8 @@
> break;
> }
> case ISD::SELECT:
> + assert(!N1.getValueType().isVector() &&
> + "Should use ISD::VSELECT for vector select!");
> if (N1C) {
> if (N1C->getZExtValue())
> return N2; // select true, X, Y -> X
> <D903.2.patch>
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