[LLVMdev] Problems with 64-bit register operands of inline asm on ARM

[Jim Grosbach]

On Mar 27, 2013, at 2:38 PM, Weiming Zhao <weimingz at codeaurora.org> wrote:

> Hi Måns
> 
> Oh, so you mean GAS will implicitly add a reg even if only one reg is specified in assembly. Right?

Both registers are required in the syntax. GAS is more lenient, but is in error. We don't need to follow their bad example here.

-Jim


> So llvm's job is to emit an even reg in this case. 
> If so, we're good now:
> ...
> 	@APP
> 	ldrd r2, [r1]
> 	@NO_APP
> ...
> 
> I just need to update the unit test to include this test.
> 
> Weiming
> 
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
> 
> -----Original Message-----
> From: Måns Rullgård [mailto:mans at mansr.com] 
> Sent: Wednesday, March 27, 2013 10:14 AM
> To: weimingz at codeaurora.org
> Cc: 'Renato Golin'; 'Kristof Beyls'; 'Eric Christopher'; 'Måns Rullgård'; 'Jim Grosbach'; 'Jakob Stoklund Olesen'; 'LLVM Commits'
> Subject: Re: [LLVMdev] Problems with 64-bit register operands of inline asm on ARM
> 
> "Weiming Zhao" <weimingz at codeaurora.org> writes:
> 
>> Hi Renato,
>> 
>> GCC doesn’t do this correctly:
>> 
>> #APP
>> 
>> @ 4 "ldrd1.c" 1
>> 
>>                ldrd r4, [r1]
>> 
>> @ 0 "" 2
> 
> That is correct in some sense.  The GNU assembler allows a single register with ldrd and friends, the second one in this case being implicitly one higher (as in the ARM instruction encoding).
> 
> To be maximally compatible, the integrated assembler would need to support this abbreviated syntax as well.
> 
> --
> Måns Rullgård
> mans at mansr.com

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