<html><head><meta http-equiv="Content-Type" content="text/html charset=windows-1252"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;"><br><div><div>On Mar 27, 2013, at 2:38 PM, Weiming Zhao <<a href="mailto:weimingz@codeaurora.org">weimingz@codeaurora.org</a>> wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite"><div style="letter-spacing: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-size-adjust: auto; -webkit-text-stroke-width: 0px;">Hi Måns<br><br>Oh, so you mean GAS will implicitly add a reg even if only one reg is specified in assembly. Right?<br></div></blockquote><div><br></div><div>Both registers are required in the syntax. GAS is more lenient, but is in error. We don't need to follow their bad example here.</div><div><br></div><div>-Jim</div><div><br></div><br><blockquote type="cite"><div style="letter-spacing: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-size-adjust: auto; -webkit-text-stroke-width: 0px;">So llvm's job is to emit an even reg in this case.<span class="Apple-converted-space"> </span><br>If so, we're good now:<br>...<br><span class="Apple-tab-span" style="white-space: pre;"> </span>@APP<br><span class="Apple-tab-span" style="white-space: pre;"> </span>ldrd r2, [r1]<br><span class="Apple-tab-span" style="white-space: pre;"> </span>@NO_APP<br>...<br><br>I just need to update the unit test to include this test.<br><br>Weiming<br><br>Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation<br><br>-----Original Message-----<br>From: Måns Rullgård [<a href="mailto:mans@mansr.com">mailto:mans@mansr.com</a>]<span class="Apple-converted-space"> </span><br>Sent: Wednesday, March 27, 2013 10:14 AM<br>To: <a href="mailto:weimingz@codeaurora.org">weimingz@codeaurora.org</a><br>Cc: 'Renato Golin'; 'Kristof Beyls'; 'Eric Christopher'; 'Måns Rullgård'; 'Jim Grosbach'; 'Jakob Stoklund Olesen'; 'LLVM Commits'<br>Subject: Re: [LLVMdev] Problems with 64-bit register operands of inline asm on ARM<br><br>"Weiming Zhao" <<a href="mailto:weimingz@codeaurora.org">weimingz@codeaurora.org</a>> writes:<br><br><blockquote type="cite">Hi Renato,<br><br>GCC doesn’t do this correctly:<br><br>#APP<br><br>@ 4 "ldrd1.c" 1<br><br> ldrd r4, [r1]<br><br>@ 0 "" 2<br></blockquote><br>That is correct in some sense. The GNU assembler allows a single register with ldrd and friends, the second one in this case being implicitly one higher (as in the ARM instruction encoding).<br><br>To be maximally compatible, the integrated assembler would need to support this abbreviated syntax as well.<br><br>--<br>Måns Rullgård<br><a href="mailto:mans@mansr.com">mans@mansr.com</a></div></blockquote></div><br></body></html>