[LLVMdev] Problems with 64-bit register operands of inline asm on ARM

[Måns Rullgård]

"Weiming Zhao" <weimingz at codeaurora.org> writes:

> Hi Renato,
>
> GCC doesn’t do this correctly:
>
> #APP
>
> @ 4 "ldrd1.c" 1
>
>                 ldrd r4, [r1]
>
> @ 0 "" 2

That is correct in some sense.  The GNU assembler allows a single
register with ldrd and friends, the second one in this case being
implicitly one higher (as in the ARM instruction encoding).

To be maximally compatible, the integrated assembler would need to
support this abbreviated syntax as well.

-- 
Måns Rullgård
mans at mansr.com