[PATCH] Add HLE target feature

[Krzysztof Parzyszek]

On 2/27/2013 6:23 PM, Jeffrey Yasskin wrote:
>
> I'm curious how Power can take advantage of HLE metadata. Could you
> post an example LLVM IR sequence and its expansion into both x86 and
> Power assembly?

A2 has some support for "writeless" locks: there is a "ldawx" 
instruction that sets a watchpoint associated with the cache line from 
which the load occured. If other threads write into that cache line, the 
watchpoint is cleared.  The thread can then test if all the watchpoints 
are still set (or if one or more has been cleared).

This is not a part of the PowerPC ISA, btw.

-Krzysztof

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