[llvm-commits] Fixing Bug 13662: paired register for inline asm with 64-bit data on ARM

[Weiming Zhao]

Hi Jakob,

 

I put my question inline.

 

From: Jakob Stoklund Olesen [mailto:stoklund at 2pi.dk] 
Sent: Wednesday, December 05, 2012 3:14 PM
To: weimingz at codeaurora.org
Cc: Commit Messages and Patches for LLVM; James Grosbach
Subject: Re: [llvm-commits] Fixing Bug 13662: paired register for inline asm
with 64-bit data on ARM

 

 

On Dec 5, 2012, at 11:39 AM, "Weiming Zhao" <weimingz at codeaurora.org> wrote:





Hi Jakob,

 

I tried your suggestion for ldrexd of inlineasm. It works now. Could you
please check my steps below and see if I'm on the right track:

 

1.       In DAG selection for inlineAsm, I use createGPRPairNode() instead
of createVirtualRegister() to replace the original two GPRs. The use of the
original two GPRs are replaced with Extract_Subreg node. So the code would
be like:

Vreg0 = REG_SEQUENCE(..);  INLNEASM (. VReg0);  Vreg1 = Extract_subreg
vreg0, idx_0; .

 

 

It looks like you are confusing the inputs and outputs to the inline asm.
They should be handled completely separately.

Weiming: Here, I'm just trying the output from the linlieasm (i.e. ldrexd)
So Vreg0 = REG_SEQUENCE(implicit_def, implicit_def), where implicit_def is a
IMPLICIT_DEF node. So Vreg0 provides an implicit def node to inlineasm.
After the inlineasm, extract_subreg gets the value.

Otherwise, there is no way to create a GPRPair node.

 

2.       I have to fix INLINEASM case of InstrEmitter::EmitSpecialNode() to
let it accept a REG_SEQUENCE node as well. Currently, it only expects a
RegisterSDNode for InlineAsm::Kind_RegDefEarlyClobber/Kind_Clobber.

 

I think that outputs from an inlineasm must go through virtual registers
with a glued copyFromReg node.

Weining: Yes, each inlineasm reg operand is connected with a copyFromReg
node. But the emitter expects the operand of inlineasm to be a
RegisterSDnode, and now we replace it with a REG_SEQUENCE node.

 

 3.         I have to fix InstrEmitter::EmitSubregNode by changing
"MachineInstr *DefMI = MRI->getVRegDef(VReg)" to "MachineInstr *DefMI =
MRI->getUniqueVRegDef(VReg)". The reason is vreg0 is defined by both
REQ_Sequence and InlineAsm.

 

No. InstrEmitter is producing SSA form. If you have multiple defs of a
virtual register, something is very wrong.

Weiming: This is also because we replace VR with REG_SEQUENCE for inlinasm's
operand. Now, semantically, both the REG_SEQ and Inlineasm are both defining
the result although only inlineasm is the only actual definer. 

 

You should start by figuring out what the DAG looks like when an inline asm
node is 1. reading, and 2. writing a GPRPair value. It shouldn't be that
different from other kinds of registers.

 

/jakob

 

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