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</o:shapelayout></xml><![endif]--></head><body lang=EN-US link=blue vlink=purple><div class=WordSection1><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Hi Jakob,<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>I put my question inline.<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><div><div style='border:none;border-top:solid #B5C4DF 1.0pt;padding:3.0pt 0in 0in 0in'><p class=MsoNormal><b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'>From:</span></b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'> Jakob Stoklund Olesen [mailto:stoklund@2pi.dk] <br><b>Sent:</b> Wednesday, December 05, 2012 3:14 PM<br><b>To:</b> weimingz@codeaurora.org<br><b>Cc:</b> Commit Messages and Patches for LLVM; James Grosbach<br><b>Subject:</b> Re: [llvm-commits] Fixing Bug 13662: paired register for inline asm with 64-bit data on ARM<o:p></o:p></span></p></div></div><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal><o:p> </o:p></p><div><div><p class=MsoNormal>On Dec 5, 2012, at 11:39 AM, "Weiming Zhao" <<a href="mailto:weimingz@codeaurora.org">weimingz@codeaurora.org</a>> wrote:<o:p></o:p></p></div><p class=MsoNormal><br><br><o:p></o:p></p><div><div><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Hi Jakob,</span><o:p></o:p></p></div><div><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'> </span><o:p></o:p></p></div><div><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>I tried your suggestion for ldrexd of inlineasm. It works now. Could you please check my steps below and see if I’m on the right track:</span><o:p></o:p></p></div><div><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'> </span><o:p></o:p></p></div><div style='margin-left:.5in'><p class=MsoNormal style='text-indent:-.25in'><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>1.</span><span style='font-size:7.0pt;color:#1F497D'> <span class=apple-converted-space> </span></span><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>In DAG selection for inlineAsm, I use createGPRPairNode() instead of createVirtualRegister() to replace the original two GPRs. The use of the original two GPRs are replaced with Extract_Subreg node. So the code would be like:</span><o:p></o:p></p></div><div style='margin-left:.5in'><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Vreg0 = REG_SEQUENCE(..); INLNEASM (… VReg0); Vreg1 = Extract_subreg vreg0, idx_0; …</span><o:p></o:p></p></div></div><div><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>It looks like you are confusing the inputs and outputs to the inline asm. They should be handled completely separately.<o:p></o:p></p></div><blockquote style='margin-top:5.0pt;margin-bottom:5.0pt'><div><div style='margin-left:.5in'><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Weiming: Here, I’m just trying the output from the linlieasm (i.e. ldrexd) So Vreg0 = REG_SEQUENCE(implicit_def, implicit_def), where implicit_def is a IMPLICIT_DEF node. So Vreg0 provides an implicit def node to inlineasm. After the inlineasm, extract_subreg gets the value.<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Otherwise, there is no way to create a GPRPair node.<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'> </span><o:p></o:p></p></div><div style='margin-left:.5in'><p class=MsoNormal style='text-indent:-.25in'><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>2.</span><span style='font-size:7.0pt;color:#1F497D'> <span class=apple-converted-space> </span></span><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>I have to fix INLINEASM case of InstrEmitter::EmitSpecialNode() to let it accept a REG_SEQUENCE node as well. Currently, it only expects a RegisterSDNode for InlineAsm::Kind_RegDefEarlyClobber/Kind_Clobber.</span><o:p></o:p></p></div></div></blockquote><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>I think that outputs from an inlineasm must go through virtual registers with a glued copyFromReg node.<o:p></o:p></p></div><div><p class=MsoNormal><span style='color:#1F497D'>Weining: Yes, each inlineasm reg operand is connected with a copyFromReg node. But the emitter expects the operand of inlineasm to be a RegisterSDnode, and now we replace it with a REG_SEQUENCE node.<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p></div><blockquote style='margin-top:5.0pt;margin-bottom:5.0pt'><div><div style='margin-left:.5in'><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'> 3.</span><span style='font-size:7.0pt;color:#1F497D'> </span><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'> I have to fix InstrEmitter::EmitSubregNode by changing “MachineInstr *DefMI = MRI->getVRegDef(VReg)” to “MachineInstr *DefMI = MRI->getUniqueVRegDef(VReg)”. The reason is vreg0 is defined by both REQ_Sequence and InlineAsm.</span><o:p></o:p></p></div></div></blockquote><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>No. InstrEmitter is producing SSA form. If you have multiple defs of a virtual register, something is very wrong.<o:p></o:p></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Weiming: This is also because we replace VR with REG_SEQUENCE for inlinasm’s operand. Now, semantically, both the REG_SEQ and Inlineasm are both defining the result although only inlineasm is the only actual definer. <o:p></o:p></span></p></div><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>You should start by figuring out what the DAG looks like when an inline asm node is 1. reading, and 2. writing a GPRPair value. It shouldn't be that different from other kinds of registers.<o:p></o:p></p></div><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>/jakob<o:p></o:p></p></div><div><p class=MsoNormal><o:p> </o:p></p></div></div></div></body></html>