[llvm-commits] Fixing Bug 13662: paired register for inline asm with 64-bit data on ARM

[Jakob Stoklund Olesen]

On Dec 5, 2012, at 11:39 AM, "Weiming Zhao" <weimingz at codeaurora.org> wrote:

> Hi Jakob,
>  
> I tried your suggestion for ldrexd of inlineasm. It works now. Could you please check my steps below and see if I’m on the right track:
>  
> 1.       In DAG selection for inlineAsm, I use createGPRPairNode() instead of createVirtualRegister() to replace the original two GPRs. The use of the original two GPRs are replaced with Extract_Subreg node. So the code would be like:
> Vreg0 = REG_SEQUENCE(..);  INLNEASM (… VReg0);  Vreg1 = Extract_subreg vreg0, idx_0; …

It looks like you are confusing the inputs and outputs to the inline asm. They should be handled completely separately.
>  
> 2.       I have to fix INLINEASM case of InstrEmitter::EmitSpecialNode() to let it accept a REG_SEQUENCE node as well. Currently, it only expects a RegisterSDNode for InlineAsm::Kind_RegDefEarlyClobber/Kind_Clobber.

I think that outputs from an inlineasm must go through virtual registers with a glued copyFromReg node.

>  3.         I have to fix InstrEmitter::EmitSubregNode by changing “MachineInstr *DefMI = MRI->getVRegDef(VReg)” to “MachineInstr *DefMI = MRI->getUniqueVRegDef(VReg)”. The reason is vreg0 is defined by both REQ_Sequence and InlineAsm.

No. InstrEmitter is producing SSA form. If you have multiple defs of a virtual register, something is very wrong.

You should start by figuring out what the DAG looks like when an inline asm node is 1. reading, and 2. writing a GPRPair value. It shouldn't be that different from other kinds of registers.

/jakob

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