[llvm-commits] [PATCH][Review Requested] Fix incorrect scheduling of inline assembly referencing memory

[Villmow, Micah]

Can you add a comment in the source on why this check is needed, other than that it looks fine to me.

Micah

From: llvm-commits-bounces at cs.uiuc.edu [mailto:llvm-commits-bounces at cs.uiuc.edu] On Behalf Of Gurd, Preston
Sent: Friday, October 26, 2012 3:27 PM
To: llvm-commits at cs.uiuc.edu
Subject: [llvm-commits] [PATCH][Review Requested] Fix incorrect scheduling of inline assembly referencing memory

Here is a patch which fixes the problem with the Post RA scheduler generating an incorrect instruction sequence due to it not being aware that an inline assembly instruction may reference memory. This patch fixes the problem by causing the scheduler to always assume that any inline assembly code instruction could touch memory. This is necessary because the internal representation of the inline instruction does not include any information about memory accesses.

This should fix PR13504.

The patch also includes a test case.

Please review!

--
Preston Gurd <preston.gurd at intel.com<mailto:preston.gurd at intel.com>>
  Intel Waterloo
  SSG/DPD/ECDL/DMP

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