[llvm-commits] [llvm] r162012 - /llvm/trunk/lib/Target/X86/X86.td

[Anitha Boyapati]

On 17 August 2012 04:20, Rafael Espíndola <rafael.espindola at gmail.com>wrote:

> Can you add a test for this?
>
>
>

Attached patch tests agressive FMA  formation and intrinsics for bdver2
target. I have noticed 2 issues:

1.  In fma4-intrinsics-x86_64.ll, I had to explicitly disable FMA3 until I
fix that. (This issue was noticed during review)
2. test/CodeGen/X86/fma3-intrinsics.ll fails for one case for bdver2
because memory form of FMA is not generated. (CHECK for memory pattern
in @test_x86_fmadd_ps_y).
Since this is not an actual failure, I need to fix the CHECK pattern.

-Anitha




>  On 16 August 2012 00:04, Anitha Boyapati <anitha.boyapati at gmail.com>
> wrote:
> > Author: anithab
> > Date: Wed Aug 15 23:04:02 2012
> > New Revision: 162012
> >
> > URL: http://llvm.org/viewvc/llvm-project?rev=162012&view=rev
> > Log:
> > Patch to enable FMA on bdver2 target. Make XOP feature enable FMA4 as
> well.
> >
> > Modified:
> >     llvm/trunk/lib/Target/X86/X86.td
> >
> > Modified: llvm/trunk/lib/Target/X86/X86.td
> > URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=162012&r1=162011&r2=162012&view=diff
> >
> ==============================================================================
> > --- llvm/trunk/lib/Target/X86/X86.td (original)
> > +++ llvm/trunk/lib/Target/X86/X86.td Wed Aug 15 23:04:02 2012
> > @@ -97,7 +97,7 @@
> >                                        [FeatureAVX, FeatureSSE4A]>;
> >  def FeatureXOP     : SubtargetFeature<"xop", "HasXOP", "true",
> >                                        "Enable XOP instructions",
> > -                                      [FeatureAVX, FeatureSSE4A]>;
> > +                                      [FeatureFMA4]>;
> >  def FeatureVectorUAMem : SubtargetFeature<"vector-unaligned-mem",
> >                                            "HasVectorUAMem", "true",
> >                   "Allow unaligned memory operands on vector/SIMD
> instructions">;
> > @@ -226,7 +226,7 @@
> >  def : Proc<"bdver2",          [FeatureXOP, FeatureFMA4,
> FeatureCMPXCHG16B,
> >                                 FeatureAES, FeaturePCLMUL,
> >                                 FeatureF16C, FeatureLZCNT,
> > -                               FeaturePOPCNT, FeatureBMI]>;
> > +                               FeaturePOPCNT, FeatureBMI, FeatureFMA]>;
> >
> >  def : Proc<"winchip-c6",      [FeatureMMX]>;
> >  def : Proc<"winchip2",        [Feature3DNow]>;
> >
> >
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> > llvm-commits at cs.uiuc.edu
> > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>



-- 
* Anitha*
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