[llvm-commits] [PATCH 3/4] (REVIEW REQUEST) Mips specific inline asm constraint 'J'

[Jack Carter]

Integer zero.

main()
{
  unsigned int i_input = 7; unsigned int i_result = 0;

// Good: i_val is 0 which matches the constraint 'J' for it.
  unsigned int i_val = 0;
  __asm__ ("addi %0,%1,%2" : "=r" (i_result)  : "r" (i_input), "J" (i_val));
  printf ("mips_addi(%d,0) = %d\n", i_input, i_result);

// Bad: i_val is not 0 llc should produce an error.
  unsigned int i_val = 3;
  __asm__ ("addi %0,%1,%2" : "=r" (i_result)  : "r" (i_input), "J" (i_val));
  printf ("mips_addi(%d,0) = %d\n", i_input, i_result);
}
---
 lib/Target/Mips/MipsISelLowering.cpp         |   14 ++++++++++++++
 test/CodeGen/Mips/inlineasm-cnstrnt-bad-J.ll |   21 +++++++++++++++++++++
 test/CodeGen/Mips/inlineasm_constraint.ll    |    9 ++++++++-
 3 files changed, 43 insertions(+), 1 deletions(-)
 create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-bad-J.ll
-------------- next part --------------
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index 466a52a..9240831 100644
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -2927,6 +2927,7 @@ MipsTargetLowering::getSingleConstraintMatchWeight(
       weight = CW_Register;
     break;
   case 'I': // signed 16 bit immediate
+  case 'J': // integer zero
     if (isa<ConstantInt>(CallOperandVal))
       weight = CW_Constant;
     break;
@@ -2996,6 +2997,19 @@ void MipsTargetLowering::LowerAsmOperandForConstraint(SDValue Op,
       }
     }
     return;
+  case 'J': // integer zero
+    if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) {
+      // GCC allows both shorts and ints even though the spec states integer
+      if (!((Op.getValueType() == MVT::i16) || (Op.getValueType() == MVT::i32)))
+        return; // This will produce an error
+
+      int32_t Val = C->getZExtValue();
+      if (Val == 0) {
+        Result = DAG.getTargetConstant(C->getZExtValue(), Op.getValueType());
+        break;
+      }
+    }
+    return;
   }
 
   if (Result.getNode()) {
diff --git a/test/CodeGen/Mips/inlineasm-cnstrnt-bad-J.ll b/test/CodeGen/Mips/inlineasm-cnstrnt-bad-J.ll
new file mode 100644
index 0000000..e45949f
--- /dev/null
+++ b/test/CodeGen/Mips/inlineasm-cnstrnt-bad-J.ll
@@ -0,0 +1,21 @@
+;XFAIL:
+;
+;This is a negative test. The constant value given for the constraint (J)
+;is non-zero (3).
+;
+; RUN: not llc -march=mipsel < %s 
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"
+target triple = "mipsel-unknown-linux"
+
+ at .str = private unnamed_addr constant [22 x i8] c"mips_addi(%d,0) = %d\0A\00", align 1
+
+define i32 @main() nounwind {
+entry:
+  %0 = tail call i32 asm "addi $0,$1,$2", "=r,r,J"(i32 1024, i32 3) nounwind, !srcloc !0
+  ret i32 0
+}
+
+declare i32 @printf(i8* nocapture, ...) nounwind
+
+!0 = metadata !{i32 147}
diff --git a/test/CodeGen/Mips/inlineasm_constraint.ll b/test/CodeGen/Mips/inlineasm_constraint.ll
index 4e392a2..4752411 100644
--- a/test/CodeGen/Mips/inlineasm_constraint.ll
+++ b/test/CodeGen/Mips/inlineasm_constraint.ll
@@ -11,11 +11,18 @@ entry:
 
 ; Then I with int
 ; CHECK: #APP
-; CHECK: addi $2,$2,-3
+; CHECK: addi $3,$2,-3
 ; CHECK: #NO_APP
    %1 = tail call i32 asm sideeffect "addi $0,$1,$2", "=r,r,I"(i32 7, i32 -3) nounwind, !srcloc !1
+
+; Now J with 0
+; CHECK: #APP
+; CHECK: addi $2,$2,0
+; CHECK: #NO_APP
+  %2 = tail call i32 asm sideeffect "addi $0,$1,$2\0A\09 ", "=r,r,J"(i32 7, i16 0) nounwind, !srcloc !2
   ret i32 0
 }
 
 !0 = metadata !{i32 133, i32 149}
 !1 = metadata !{i32 466}
+!2 = metadata !{i32 537, i32 553}