[llvm-bugs] [Bug 242247] [RISCV] "cannot implicitly convert a scalable size to a fixed-width size" in WidenVecRes_BITCAST with BitInt and RVV at -Os

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Fri Nov 13 02:31:30 PST 2026

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Previous message: [llvm-bugs] [Bug 242246] [AArch64] Vector/scalar union forces args+retval to go through GPRs even in internal functions, unnecessary NEON<->GPR moves
Next message: [llvm-bugs] [Bug 242250] [PowerPC] post-RA machine scheduler moves the epilogue's CR2-CR4 restore above a read of CR2
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