[llvm-bugs] [Bug 242246] [AArch64] Vector/scalar union forces args+retval to go through GPRs even in internal functions, unnecessary NEON<->GPR moves

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Fri Nov 13 02:29:42 PST 2026

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Previous message: [llvm-bugs] [Bug 242245] [RISCV] error in backend "Do not know how to promote this operator's operand!" on vp_scatter with BitInt and RVV
Next message: [llvm-bugs] [Bug 242247] [RISCV] "cannot implicitly convert a scalable size to a fixed-width size" in WidenVecRes_BITCAST with BitInt and RVV at -Os
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