[llvm-bugs] [Bug 50762] New: [MC][Thumb2] Out-of-range post-index offset is quietly truncated

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=50762

            Bug ID: 50762
           Summary: [MC][Thumb2] Out-of-range post-index offset is quietly
                    truncated
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: ARM
          Assignee: unassignedbugs at nondot.org
          Reporter: rprichard at google.com
                CC: llvm-bugs at lists.llvm.org, smithp352 at googlemail.com,
                    Ties.Stuij at arm.com

If a Thumb2 ldr/str instruction uses an out-of-range post-index offset, the
LLVM assembler quietly truncates the offset. It should be a fatal assembler
error instead.

cat >test.s <<EOF
  .arch armv7-a
  .text
  .thumb
func:
  .arch armv7-a
  .text
  .thumb
  ldr r0, [r1], #0            // 0
  ldr r0, [r1], #0x100        // 4
  ldr r0, [r1], #0x10000      // 8
  ldr r0, [r1], #1            // c
  ldr r0, [r1], #0x101        // 10
  ldr r0, [r1], #0x10001      // 14
  ldr r0, [r1], #-0           // 18
  ldr r0, [r1], #-256         // 1c
  ldr r0, [r1], #0x80000000   // 20
  ldr r0, [r1], #-255         // 24
  ldr r0, [r1], #0x80000001   // 28
EOF
llvm-mc --triple armv7a-linux test.s --filetype=obj -o test.o
llvm-objdump -d test.o

Output:

       00000000 <func>:
              0: 51 f8 00 0b       ldr    r0, [r1], #0
              4: 51 f8 00 0b       ldr    r0, [r1], #0
              8: 51 f8 00 0b       ldr    r0, [r1], #0
              c: 51 f8 01 0b       ldr    r0, [r1], #1
             10: 51 f8 01 0b       ldr    r0, [r1], #1
             14: 51 f8 01 0b       ldr    r0, [r1], #1
             18: 51 f8 00 09       ldr    r0, [r1], #-0
             1c: 51 f8 00 09       ldr    r0, [r1], #-0
             20: 51 f8 00 09       ldr    r0, [r1], #-0
             24: 51 f8 ff 09       ldr    r0, [r1], #-255
             28: 51 f8 ff 09       ldr    r0, [r1], #-255

Invalid offsets are rejected when they are ordinary offsets or pre-index
offsets:

    ldr r0, [r1, #0x1000]
    ldr r0, [r1, #0x100]!
    ldr r0, [r1, #-0x100]
    ldr r0, [r1, #-0x100]!

becomes:

    test.s:9:11: error: invalid operand for instruction
      ldr r0, [r1, #0x1000]
              ^
    test.s:10:3: error: invalid instruction, any one of the following would fix
this:
      ldr r0, [r1, #0x100]!
      ^
    test.s:10:11: note: invalid operand for instruction
      ldr r0, [r1, #0x100]!
              ^
    test.s:10:3: note: instruction requires: arm-mode
      ldr r0, [r1, #0x100]!
      ^
    test.s:10:23: note: too many operands for instruction
      ldr r0, [r1, #0x100]!
                          ^
    test.s:11:3: error: invalid instruction, any one of the following would fix
this:
      ldr r0, [r1, #-0x100]
      ^
    test.s:11:11: note: invalid operand for instruction
      ldr r0, [r1, #-0x100]
              ^
    test.s:11:3: note: instruction requires: arm-mode
      ldr r0, [r1, #-0x100]
      ^
    test.s:12:3: error: invalid instruction, any one of the following would fix
this:
      ldr r0, [r1, #-0x100]!
      ^
    test.s:12:11: note: invalid operand for instruction
      ldr r0, [r1, #-0x100]!
              ^
    test.s:12:3: note: instruction requires: arm-mode
      ldr r0, [r1, #-0x100]!
      ^

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