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<base href="https://bugs.llvm.org/">
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<body><table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [MC][Thumb2] Out-of-range post-index offset is quietly truncated"
href="https://bugs.llvm.org/show_bug.cgi?id=50762">50762</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>[MC][Thumb2] Out-of-range post-index offset is quietly truncated
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>Linux
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>Backend: ARM
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>rprichard@google.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org, smithp352@googlemail.com, Ties.Stuij@arm.com
</td>
</tr></table>
<p>
<div>
<pre>If a Thumb2 ldr/str instruction uses an out-of-range post-index offset, the
LLVM assembler quietly truncates the offset. It should be a fatal assembler
error instead.
cat >test.s <<EOF
.arch armv7-a
.text
.thumb
func:
.arch armv7-a
.text
.thumb
ldr r0, [r1], #0 // 0
ldr r0, [r1], #0x100 // 4
ldr r0, [r1], #0x10000 // 8
ldr r0, [r1], #1 // c
ldr r0, [r1], #0x101 // 10
ldr r0, [r1], #0x10001 // 14
ldr r0, [r1], #-0 // 18
ldr r0, [r1], #-256 // 1c
ldr r0, [r1], #0x80000000 // 20
ldr r0, [r1], #-255 // 24
ldr r0, [r1], #0x80000001 // 28
EOF
llvm-mc --triple armv7a-linux test.s --filetype=obj -o test.o
llvm-objdump -d test.o
Output:
00000000 <func>:
0: 51 f8 00 0b ldr r0, [r1], #0
4: 51 f8 00 0b ldr r0, [r1], #0
8: 51 f8 00 0b ldr r0, [r1], #0
c: 51 f8 01 0b ldr r0, [r1], #1
10: 51 f8 01 0b ldr r0, [r1], #1
14: 51 f8 01 0b ldr r0, [r1], #1
18: 51 f8 00 09 ldr r0, [r1], #-0
1c: 51 f8 00 09 ldr r0, [r1], #-0
20: 51 f8 00 09 ldr r0, [r1], #-0
24: 51 f8 ff 09 ldr r0, [r1], #-255
28: 51 f8 ff 09 ldr r0, [r1], #-255
Invalid offsets are rejected when they are ordinary offsets or pre-index
offsets:
ldr r0, [r1, #0x1000]
ldr r0, [r1, #0x100]!
ldr r0, [r1, #-0x100]
ldr r0, [r1, #-0x100]!
becomes:
test.s:9:11: error: invalid operand for instruction
ldr r0, [r1, #0x1000]
^
test.s:10:3: error: invalid instruction, any one of the following would fix
this:
ldr r0, [r1, #0x100]!
^
test.s:10:11: note: invalid operand for instruction
ldr r0, [r1, #0x100]!
^
test.s:10:3: note: instruction requires: arm-mode
ldr r0, [r1, #0x100]!
^
test.s:10:23: note: too many operands for instruction
ldr r0, [r1, #0x100]!
^
test.s:11:3: error: invalid instruction, any one of the following would fix
this:
ldr r0, [r1, #-0x100]
^
test.s:11:11: note: invalid operand for instruction
ldr r0, [r1, #-0x100]
^
test.s:11:3: note: instruction requires: arm-mode
ldr r0, [r1, #-0x100]
^
test.s:12:3: error: invalid instruction, any one of the following would fix
this:
ldr r0, [r1, #-0x100]!
^
test.s:12:11: note: invalid operand for instruction
ldr r0, [r1, #-0x100]!
^
test.s:12:3: note: instruction requires: arm-mode
ldr r0, [r1, #-0x100]!
^</pre>
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