[llvm-bugs] [Bug 50593] New: riscv_vector_builtin_cg.inc - repeated assignment of Intrinsic::riscv_vcompress

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=50593

            Bug ID: 50593
           Summary: riscv_vector_builtin_cg.inc - repeated assignment of
                    Intrinsic::riscv_vcompress
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: RISC-V
          Assignee: unassignedbugs at nondot.org
          Reporter: llvm-dev at redking.me.uk
                CC: asb at lowrisc.org, craig.topper at gmail.com,
                    llvm-bugs at lists.llvm.org

Reported in
https://llvm.org/reports/scan-build/report-riscv_vector_builtin_cg.inc-EmitRISCVBuiltinExpr--15297-1.html#EndPath

build-llvm/tools/clang/include/clang/Basic/riscv_vector_builtin_cg.inc  

EmitRISCVBuiltinExpr sets the intrinsic ID twice, suggesting some tblgen
messiness:

case RISCV::BI__builtin_rvv_vcompress_vm_u32m1:
case RISCV::BI__builtin_rvv_vcompress_vm_u32m2:
case RISCV::BI__builtin_rvv_vcompress_vm_u32m4:
case RISCV::BI__builtin_rvv_vcompress_vm_u32m8:
case RISCV::BI__builtin_rvv_vcompress_vm_u32mf2:
case RISCV::BI__builtin_rvv_vcompress_vm_u64m1:
case RISCV::BI__builtin_rvv_vcompress_vm_u64m2:
case RISCV::BI__builtin_rvv_vcompress_vm_u64m4:
case RISCV::BI__builtin_rvv_vcompress_vm_u64m8:
  ID = Intrinsic::riscv_vcompress;

      std::rotate(Ops.begin(), Ops.begin() + 1, Ops.begin() + 3);
      ID = Intrinsic::riscv_vcompress;
       IntrinsicTypes = {ResultType, Ops[3]->getType()};
    break;

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