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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - riscv_vector_builtin_cg.inc - repeated assignment of Intrinsic::riscv_vcompress"
href="https://bugs.llvm.org/show_bug.cgi?id=50593">50593</a>
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<th>Summary</th>
<td>riscv_vector_builtin_cg.inc - repeated assignment of Intrinsic::riscv_vcompress
</td>
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Windows NT
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>enhancement
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: RISC-V
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>llvm-dev@redking.me.uk
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<th>CC</th>
<td>asb@lowrisc.org, craig.topper@gmail.com, llvm-bugs@lists.llvm.org
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<pre>Reported in
<a href="https://llvm.org/reports/scan-build/report-riscv_vector_builtin_cg.inc-EmitRISCVBuiltinExpr--15297-1.html#EndPath">https://llvm.org/reports/scan-build/report-riscv_vector_builtin_cg.inc-EmitRISCVBuiltinExpr--15297-1.html#EndPath</a>
build-llvm/tools/clang/include/clang/Basic/riscv_vector_builtin_cg.inc
EmitRISCVBuiltinExpr sets the intrinsic ID twice, suggesting some tblgen
messiness:
case RISCV::BI__builtin_rvv_vcompress_vm_u32m1:
case RISCV::BI__builtin_rvv_vcompress_vm_u32m2:
case RISCV::BI__builtin_rvv_vcompress_vm_u32m4:
case RISCV::BI__builtin_rvv_vcompress_vm_u32m8:
case RISCV::BI__builtin_rvv_vcompress_vm_u32mf2:
case RISCV::BI__builtin_rvv_vcompress_vm_u64m1:
case RISCV::BI__builtin_rvv_vcompress_vm_u64m2:
case RISCV::BI__builtin_rvv_vcompress_vm_u64m4:
case RISCV::BI__builtin_rvv_vcompress_vm_u64m8:
ID = Intrinsic::riscv_vcompress;
std::rotate(Ops.begin(), Ops.begin() + 1, Ops.begin() + 3);
ID = Intrinsic::riscv_vcompress;
IntrinsicTypes = {ResultType, Ops[3]->getType()};
break;</pre>
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