[llvm-bugs] [Bug 45949] New: [X86] SSE intrinsic instructions selected using selectScalarSSELoad don't get MachineMemoryOperands

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=45949

            Bug ID: 45949
           Summary: [X86] SSE intrinsic instructions selected using
                    selectScalarSSELoad don't get MachineMemoryOperands
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: craig.topper at gmail.com
                CC: craig.topper at gmail.com, llvm-bugs at lists.llvm.org,
                    llvm-dev at redking.me.uk, spatel+llvm at rotateright.com

Using a complex pattern like this doesn't give any mechanism for supplying a
MemRef to use on the final isel MachineSDNode.

We could try to invent a mechanism. Or maybe do a post process combine to fold
the load instead after initial selection. Or do custom isel for the whole
instruction. Or maybe remove it from isel and just use the peephole pass? Not
sure if it can get all cases or not.

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