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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [X86] SSE intrinsic instructions selected using selectScalarSSELoad don't get MachineMemoryOperands"
href="https://bugs.llvm.org/show_bug.cgi?id=45949">45949</a>
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<th>Summary</th>
<td>[X86] SSE intrinsic instructions selected using selectScalarSSELoad don't get MachineMemoryOperands
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<th>Product</th>
<td>libraries
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<th>Version</th>
<td>trunk
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<th>Hardware</th>
<td>PC
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<th>OS</th>
<td>All
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<th>Status</th>
<td>NEW
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<th>Severity</th>
<td>enhancement
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: X86
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>craig.topper@gmail.com
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<th>CC</th>
<td>craig.topper@gmail.com, llvm-bugs@lists.llvm.org, llvm-dev@redking.me.uk, spatel+llvm@rotateright.com
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<pre>Using a complex pattern like this doesn't give any mechanism for supplying a
MemRef to use on the final isel MachineSDNode.
We could try to invent a mechanism. Or maybe do a post process combine to fold
the load instead after initial selection. Or do custom isel for the whole
instruction. Or maybe remove it from isel and just use the peephole pass? Not
sure if it can get all cases or not.</pre>
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