[llvm-bugs] [Bug 42026] New: [X86] Scalarize non-temporal vector stores with poor alignment

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https://bugs.llvm.org/show_bug.cgi?id=42026

            Bug ID: 42026
           Summary: [X86] Scalarize non-temporal vector stores with poor
                    alignment
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: llvm-dev at redking.me.uk
                CC: andrea.dibiagio at gmail.com, craig.topper at gmail.com,
                    llvm-bugs at lists.llvm.org, llvm-dev at redking.me.uk,
                    spatel+llvm at rotateright.com

This possibly could be a generic DAG expansion, but I'm making it X86
initially.

The SSE/AVX NT store operations require vector alignment, so if that isn't
possible we currently emit general unaligned load/stores.

Given the coder has gone to the trouble of declaring the ops as non-temporal,
its almost certainly going to be worthwhile scalarizing the ops and using
scalar NT stores to try and avoid cache pollution.

In most cases this will involve trying to use SSE2's MOVNTI i32/i64 op, but if
we have SSE4A we can try to keep on the SIMD unit with MOVNTSD/MOVNTSS.

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