[llvm-bugs] [Bug 42644] New: Suboptimal code for (size_t) (int) (size_t) X

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=42644

            Bug ID: 42644
           Summary: Suboptimal code for (size_t) (int) (size_t) X
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Transformation Utilities
          Assignee: unassignedbugs at nondot.org
          Reporter: david.bolvansky at gmail.com
                CC: llvm-bugs at lists.llvm.org

size_t pat(size_t r) {
    int len = r + 1;
    return len;
}


GCC -O3 trunk:
pat(unsigned long):
        lea     eax, [rdi+1]
        cdqe
        ret

CLang -O3 trunk:
pat(unsigned long):                               
        shl     rdi, 32
        movabs  rax, 4294967296
        add     rax, rdi
        sar     rax, 32
        ret

ICC -O3 trunk:
pat(unsigned long):
        inc       rdi                                           
        movsxd    rax, edi                                     
        ret        

Maybe InstCombine is too aggresive and backend is unable to undo it?


** IR Dump After Dead Argument Elimination ***

; ModuleID = '<source>'

source_filename = "<source>"

target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"

target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: nounwind uwtable

define dso_local i64 @_Z2f2m(i64) local_unnamed_addr #0 !dbg !255 {

  call void @llvm.dbg.value(metadata i64 %0, metadata !260, metadata
!DIExpression()), !dbg !262

  %2 = add i64 %0, 1, !dbg !263

  %3 = trunc i64 %2 to i32, !dbg !264

  call void @llvm.dbg.value(metadata i32 %3, metadata !261, metadata
!DIExpression()), !dbg !262

  %4 = sext i32 %3 to i64, !dbg !265

  ret i64 %4, !dbg !266

}

*** IR Dump After Combine redundant instructions ***

; Function Attrs: nounwind uwtable

define dso_local i64 @_Z2f2m(i64) local_unnamed_addr #0 !dbg !255 {

  call void @llvm.dbg.value(metadata i64 %0, metadata !260, metadata
!DIExpression()), !dbg !262

  %2 = shl i64 %0, 32, !dbg !263

  %3 = add i64 %2, 4294967296, !dbg !263

  %4 = ashr exact i64 %3, 32, !dbg !263

  ret i64 %4, !dbg !264

}

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