[llvm-bugs] [Bug 41636] New: [arm][neon] llvm.experimental.reduce.{and, any} don't lower properly for boolean vectors

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=41636

            Bug ID: 41636
           Summary: [arm][neon] llvm.experimental.reduce.{and, any} don't
                    lower properly for boolean vectors
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: ARM
          Assignee: unassignedbugs at nondot.org
          Reporter: llvm-dev at redking.me.uk
                CC: gonzalobg88 at gmail.com, llvm-bugs at lists.llvm.org,
                    peter.smith at linaro.org, Ties.Stuij at arm.com

Split off from [Bug #36702], armv7a generates poor code for boolean reduction
from generic IR - either with the llvm.experimental.vector.reduce intrinsics
(which expand to a shuffle reduction chain) or with bitcasts of the comparison
result mask:

https://godbolt.org/z/U7C4n4

e.g.

## ARMv7+NEON

LLVM6:

all_8x8:
 vmov.i8 d0, #0x1
 vldr    d1, [r0]
 vtst.8  d0, d1, d0
 vext.8  d1, d0, d0, #4
 vand    d0, d0, d1
 vext.8  d1, d0, d0, #2
 vand    d0, d0, d1
 vdup.8  d1, d0[1]
 vand    d0, d0, d1
 vmov.u8 r0, d0[0]
 and     r0, r0, #1
 bx      lr
any_8x8:
 vmov.i8 d0, #0x1
 vldr    d1, [r0]
 vtst.8  d0, d1, d0
 vext.8  d1, d0, d0, #4
 vorr    d0, d0, d1
 vext.8  d1, d0, d0, #2
 vorr    d0, d0, d1
 vdup.8  d1, d0[1]
 vorr    d0, d0, d1
 vmov.u8 r0, d0[0]
 and     r0, r0, #1
 bx      lr

Manually generated:

all_8x8:
 vldr    d0, [r0]
 vpmin.u8 d16, d0, d16
 vpmin.u8 d16, d16, d16
 vpmin.u8 d0, d16, d16
 vmov.u8 r0, d0[0]
 bx      lr

any_8x8:
 vldr    d0, [r0]
 vpmax.u8 d16, d0, d16
 vpmax.u8 d16, d16, d16
 vpmax.u8 d0, d16, d16
 vmov.u8 r0, d0[0]
 bx      lr

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