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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [arm][neon] llvm.experimental.reduce.{and, any} don't lower properly for boolean vectors"
href="https://bugs.llvm.org/show_bug.cgi?id=41636">41636</a>
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<th>Summary</th>
<td>[arm][neon] llvm.experimental.reduce.{and, any} don't lower properly for boolean vectors
</td>
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Windows NT
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>enhancement
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: ARM
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>llvm-dev@redking.me.uk
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<th>CC</th>
<td>gonzalobg88@gmail.com, llvm-bugs@lists.llvm.org, peter.smith@linaro.org, Ties.Stuij@arm.com
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<pre>Split off from [<a class="bz_bug_link
bz_status_NEW "
title="NEW - llvm.experimental.reduce.{and, any} don't lower properly for boolean vectors"
href="show_bug.cgi?id=36702">Bug #36702</a>], armv7a generates poor code for boolean reduction
from generic IR - either with the llvm.experimental.vector.reduce intrinsics
(which expand to a shuffle reduction chain) or with bitcasts of the comparison
result mask:
<a href="https://godbolt.org/z/U7C4n4">https://godbolt.org/z/U7C4n4</a>
e.g.
## ARMv7+NEON
LLVM6:
all_8x8:
vmov.i8 d0, #0x1
vldr d1, [r0]
vtst.8 d0, d1, d0
vext.8 d1, d0, d0, #4
vand d0, d0, d1
vext.8 d1, d0, d0, #2
vand d0, d0, d1
vdup.8 d1, d0[1]
vand d0, d0, d1
vmov.u8 r0, d0[0]
and r0, r0, #1
bx lr
any_8x8:
vmov.i8 d0, #0x1
vldr d1, [r0]
vtst.8 d0, d1, d0
vext.8 d1, d0, d0, #4
vorr d0, d0, d1
vext.8 d1, d0, d0, #2
vorr d0, d0, d1
vdup.8 d1, d0[1]
vorr d0, d0, d1
vmov.u8 r0, d0[0]
and r0, r0, #1
bx lr
Manually generated:
all_8x8:
vldr d0, [r0]
vpmin.u8 d16, d0, d16
vpmin.u8 d16, d16, d16
vpmin.u8 d0, d16, d16
vmov.u8 r0, d0[0]
bx lr
any_8x8:
vldr d0, [r0]
vpmax.u8 d16, d0, d16
vpmax.u8 d16, d16, d16
vpmax.u8 d0, d16, d16
vmov.u8 r0, d0[0]
bx lr</pre>
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