[llvm-bugs] [Bug 41454] New: [X86] Support X86ISD::VPTERNLOG ternary logic on all SSE/AVX targets

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=41454

            Bug ID: 41454
           Summary: [X86] Support X86ISD::VPTERNLOG ternary logic on all
                    SSE/AVX targets
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: llvm-dev at redking.me.uk
                CC: andrea.dibiagio at gmail.com, craig.topper at gmail.com,
                    lebedev.ri at gmail.com, llvm-bugs at lists.llvm.org,
                    llvm-dev at redking.me.uk, nikita.ppv at gmail.com,
                    spatel+llvm at rotateright.com

AVX512 has the VPTERNLOG instructions which can be used to describe all truth
table lookups for a 3bit index created from the same bit from 3 registers and a
i8 immediate control word.

It'd be very useful to use this to combine ternary logic patterns using this
DAG node and lower to optimized bitops patterns on all SSE/AVX targets, not
just AVX512.

This is a big generalization of the canonicalizeBitSelect function that we
already have.

Examples can be found at:
http://www.0x80.pl/articles/avx512-ternary-functions.html
https://github.com/WojciechMula/ternary-logic

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