[LLVMbugs] [Bug 18369] New: [thumbv8] assertion fails due to inconsistent CPSR liveness of IT blocks

bugzilla-daemon at llvm.org bugzilla-daemon at llvm.org
Fri Jan 3 11:58:52 PST 2014


http://llvm.org/bugs/show_bug.cgi?id=18369

            Bug ID: 18369
           Summary: [thumbv8] assertion fails due to inconsistent CPSR
                    liveness of IT blocks
           Product: new-bugs
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: normal
          Priority: P
         Component: new bugs
          Assignee: unassignedbugs at nondot.org
          Reporter: weimingz at codeaurora.org
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified

Created attachment 11811
  --> http://llvm.org/bugs/attachment.cgi?id=11811&action=edit
test case

Post-RA scheduler reorders a bundele instruction (IT block) and a vseleq.
However, it only flippes the CPSR liveness of the bundle instruction, leaves
the instructions inside the bundle unchanged, which causes inconstance.

E.g.
Before post-RA scheduler:
BB#5: derived from LLVM BB %if.then80
    Predecessors according to CFG: BB#4
...
    tCMPi8 %R1, 0, pred:14, pred:%noreg, %CPSR<imp-def>
    %D16<def> = VSELEQD %D16<kill>, %D16<undef>, %CPSR<imp-use>
    BUNDLE %ITSTATE<imp-def,dead>, %R0<imp-def>, %CPSR<imp-use,kill>
      * t2IT 1, 24, %ITSTATE<imp-def>
      * %R0<def> = tMOVi8 opt:%noreg, 1, pred:1, pred:%CPSR<kill>,
%ITSTATE<imp-use,kill,internal>
....
    Successors according to CFG: BB#6


After Post-RA scheduler:

Predecessors according to CFG: BB#4
...
    tCMPi8 %R1, 0, pred:14, pred:%noreg, %CPSR<imp-def>
    BUNDLE %ITSTATE<imp-def,dead>, %R0<imp-def>, %CPSR<imp-use> =====> removed
kill correctly
      * t2IT 1, 24, %ITSTATE<imp-def>
      * %R0<def> = tMOVi8 opt:%noreg, 1, pred:1, pred:%CPSR<kill>,
%ITSTATE<imp-use,kill,internal>  ============> CPSR is still KILL!!!!
    %D16<def> = VSELEQD %D16<kill>, %D16<undef>, %CPSR<imp-use,kill> ==> CPSR
is correctly fixedup


This inconsistency causes Thumb2SizeReduction.cpp::ReduceMBB() crash because
CPSR is expected to be LIVE for VSELEQD.

There is a FIXME in Thumb2SizeReduction.cpp that tries to fixup such
inconsistency, but it seems not sufficient.q

-- 
You are receiving this mail because:
You are on the CC list for the bug.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-bugs/attachments/20140103/40246da9/attachment.html>


More information about the llvm-bugs mailing list