<html>
<head>
<base href="http://llvm.org/bugs/" />
</head>
<body><table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - [thumbv8] assertion fails due to inconsistent CPSR liveness of IT blocks"
href="http://llvm.org/bugs/show_bug.cgi?id=18369">18369</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>[thumbv8] assertion fails due to inconsistent CPSR liveness of IT blocks
</td>
</tr>
<tr>
<th>Product</th>
<td>new-bugs
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>Windows NT
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>normal
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>new bugs
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>weimingz@codeaurora.org
</td>
</tr>
<tr>
<th>CC</th>
<td>llvmbugs@cs.uiuc.edu
</td>
</tr>
<tr>
<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
<p>
<div>
<pre>Created <span class=""><a href="attachment.cgi?id=11811" name="attach_11811" title="test case">attachment 11811</a> <a href="attachment.cgi?id=11811&action=edit" title="test case">[details]</a></span>
test case
Post-RA scheduler reorders a bundele instruction (IT block) and a vseleq.
However, it only flippes the CPSR liveness of the bundle instruction, leaves
the instructions inside the bundle unchanged, which causes inconstance.
E.g.
Before post-RA scheduler:
BB#5: derived from LLVM BB %if.then80
Predecessors according to CFG: BB#4
...
tCMPi8 %R1, 0, pred:14, pred:%noreg, %CPSR<imp-def>
%D16<def> = VSELEQD %D16<kill>, %D16<undef>, %CPSR<imp-use>
BUNDLE %ITSTATE<imp-def,dead>, %R0<imp-def>, %CPSR<imp-use,kill>
* t2IT 1, 24, %ITSTATE<imp-def>
* %R0<def> = tMOVi8 opt:%noreg, 1, pred:1, pred:%CPSR<kill>,
%ITSTATE<imp-use,kill,internal>
....
Successors according to CFG: BB#6
After Post-RA scheduler:
Predecessors according to CFG: BB#4
...
tCMPi8 %R1, 0, pred:14, pred:%noreg, %CPSR<imp-def>
BUNDLE %ITSTATE<imp-def,dead>, %R0<imp-def>, %CPSR<imp-use> =====> removed
kill correctly
* t2IT 1, 24, %ITSTATE<imp-def>
* %R0<def> = tMOVi8 opt:%noreg, 1, pred:1, pred:%CPSR<kill>,
%ITSTATE<imp-use,kill,internal> ============> CPSR is still KILL!!!!
%D16<def> = VSELEQD %D16<kill>, %D16<undef>, %CPSR<imp-use,kill> ==> CPSR
is correctly fixedup
This inconsistency causes Thumb2SizeReduction.cpp::ReduceMBB() crash because
CPSR is expected to be LIVE for VSELEQD.
There is a FIXME in Thumb2SizeReduction.cpp that tries to fixup such
inconsistency, but it seems not sufficient.q</pre>
</div>
</p>
<hr>
<span>You are receiving this mail because:</span>
<ul>
<li>You are on the CC list for the bug.</li>
</ul>
</body>
</html>