[LLVMbugs] [Bug 18368] New: [thumbv8] assertions fails when check for eligibility of IT block

bugzilla-daemon at llvm.org bugzilla-daemon at llvm.org
Fri Jan 3 11:43:45 PST 2014


http://llvm.org/bugs/show_bug.cgi?id=18368

            Bug ID: 18368
           Summary: [thumbv8] assertions fails when check for eligibility
                    of IT block
           Product: new-bugs
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: normal
          Priority: P
         Component: new bugs
          Assignee: unassignedbugs at nondot.org
          Reporter: weimingz at codeaurora.org
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified

@foo = global i32 ()* null
define i32 @t4(i32 %x, i32 ()* %p_foo) {
entry:
;CHECK-LABEL: t4:
;CHECK-V8-LABEL: t4:
  %cmp = icmp slt i32 %x, 60
  br i1 %cmp, label %if.then, label %if.else

if.then:                                          ; preds = %entry
  %tmp.2 = call i32 %p_foo()
  %sub = add nsw i32 %x, -1
  br label %return

if.else:                                          ; preds = %entry
  %sub1 = add nsw i32 %x, -120
  br label %return

return:                                           ; preds = %if.end5,
%if.then4, %if.then
  %retval.0 = phi i32 [ %sub, %if.then ], [ %sub1, %if.else ]
  ret i32 %retval.0
}


The above test fails when run with llc -mtriple=thumbv8

Reason:
When it attempts to check if the operand of blx is valid
for IT block, the reg should be the 3rd MOOperand. E.g.:
blx r8:
@ <MCInst #2747 tBLXr
@ <MCOperand Imm:14>
@ <MCOperand Reg:0>
@ <MCOperand Reg:74> ==> this is the operand to be checked
>

However, the default value is 0:
inline boolq(InstrType *Instr, int BLXOperandIndex = 0)

There are 2 call sites:
ARMBaseInstrInfo.cpp:      return isV8EligibleForIT(MI); ==> this one is
causing the assertion
AsmParser/ARMAsmParser.cpp:          !isV8EligibleForIT(&Inst, 2)) {

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