[llvm-branch-commits] [llvm] [SelectionDAG] Handle constants in SimplifyMultipleUseDemandedBits (PR #224882)
Matt Arsenault via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Sun Sep 20 01:14:14 PDT 2026
================
@@ -766,6 +766,12 @@ SDValue TargetLowering::SimplifyMultipleUseDemandedBits(
unsigned BitWidth = DemandedBits.getBitWidth();
KnownBits LHSKnown, RHSKnown;
switch (Op.getOpcode()) {
+ case ISD::Constant: {
+ const APInt &Value = Op->getAsAPIntVal();
+ if (!Value.isZero() && (Value & DemandedBits).isZero())
----------------
arsenm wrote:
Value.isSubsetOf(DemandedBits)? I think that's what the IR version does
https://github.com/llvm/llvm-project/pull/224882
More information about the llvm-branch-commits
mailing list