[llvm-branch-commits] [llvm] [AMDGPU] Make custom AsmParser matchers alignment aware (PR #221988)

[Valery Pykhtin via llvm-branch-commits]

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@@ -66,13 +66,24 @@ enum RegisterKind {
 // Operand
 //===----------------------------------------------------------------------===//
 
+// Why an operand predicate rejected an operand; higher values are more specific
+// and win the tiebreak in matchAndEmitInstruction. Keep None first.
+enum class OperandMatchError {
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vpykhtin wrote:

Given the amount of code added I agree, not sure how valuable the diagnostic is.

https://github.com/llvm/llvm-project/pull/221988