[llvm-branch-commits] [llvm] [AMDGPU] Make custom AsmParser matchers alignment aware (PR #221988)

[Valery Pykhtin via llvm-branch-commits]

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@@ -2255,6 +2288,23 @@ bool AMDGPUOperand::isLiteralImm(MVT type) const {
   return canLosslesslyConvertToFPType(FPLiteral, ExpectedType);
 }
 
+bool AMDGPUOperand::isRegClassByHwMode(unsigned RCByHwModeIdx) const {
+  if (!isRegKind())
+    return false;
+  int16_t RCID = AsmParser->getRegClassByHwMode(RCByHwModeIdx);
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vpykhtin wrote:

Right, it's all about misaligned diagnostics.

https://github.com/llvm/llvm-project/pull/221988