[llvm-branch-commits] [llvm] [AMDGPU] Fix the packed F32 unpack window in SIPreEmitPeephole (PR #233721)

[Akash Dutta via llvm-branch-commits]

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@@ -914,16 +916,17 @@ bool SIPreEmitPeephole::run(MachineFunction &MF, MachineLoopInfo *LoopInfo) {
   for (MachineBasicBlock &MBB : MF) {
     // Unpack packed instructions overlapped by MFMAs. This allows the
     // compiler to co-issue unpacked instructions with MFMA
-    const TargetSchedModel &SchedModel = TII->getSchedModel();
     SetVector<MachineInstr *> InstrsToUnpack;
     for (auto &MI : make_early_inc_range(MBB.instrs())) {
-      if (!SIInstrInfo::isMFMA(MI))
+      // SGEMM/DGEMM hold every VALU back, so only XDL benefits.
+      if (!SIInstrInfo::isMFMA(MI) || !TII->isXDL(MI))
         continue;
-      const MCSchedClassDesc *SchedClassDesc =
-          SchedModel.resolveSchedClass(&MI);
-      uint16_t NumMFMACycles =
-          SchedModel.getWriteProcResBegin(SchedClassDesc)->ReleaseAtCycle;
-      collectUnpackingCandidates(MI, InstrsToUnpack, NumMFMACycles);
+      unsigned PackedCycle =
+          AMDGPU::getPackedVALUIssueCycle(MI, AMDGPU::V_PK_FMA_F32, *TII);
+      unsigned VALUCycle = AMDGPU::getVALUIssueCycle(MI, *TII);
+      assert(PackedCycle >= VALUCycle && "packed VALU issues before VALU");
+      collectUnpackingCandidates(MI, InstrsToUnpack,
+                                 PackedCycle - VALUCycle + 1);
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akadutta wrote:

also, what if VALUCycle is >1? Wouldn't that lead to missed unpacking? For packed instructions that are still blocked?

https://github.com/llvm/llvm-project/pull/233721