[llvm-branch-commits] [llvm] CodeGen: Strip LiveVariables down to dead flag computation (PR #230149)

via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Thu Oct 8 07:57:19 PDT 2026


llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-llvm-regalloc

Author: Matt Arsenault (arsenm)

<details>
<summary>Changes</summary>

This analysis is dead and there are no more explicit uses. There are still
passes implicitly relying on adjustments of dead flags. Missing dead
flags are added, and implicit-def operands are added for partially dead
physical registers.

The whole pass should be deleted, but it's taking a while to get all the dead
flag changes through the rest of the compiler. As a stop-gap to try to recover
some compile time regression, and avoiding new users appearing, strip the pass
down to only commputing the dead flags.

The main side effect of this is kill flags are no longer made accurate, which
is the source of the test churn.

Co-authored-by: Claude Opus 5.5 <noreply@<!-- -->anthropic.com>

---

Patch is 142.45 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/230149.diff


37 Files Affected:

- (modified) llvm/include/llvm/CodeGen/LiveVariables.h (+7-231) 
- (modified) llvm/include/llvm/CodeGen/Passes.h (+1-2) 
- (modified) llvm/include/llvm/CodeGen/TargetInstrInfo.h (-1) 
- (modified) llvm/include/llvm/Passes/MachinePassRegistry.def (-1) 
- (modified) llvm/lib/CodeGen/LiveVariables.cpp (+53-519) 
- (modified) llvm/test/CodeGen/AArch64/GlobalISel/arm64-pcsections.ll (+16-16) 
- (modified) llvm/test/CodeGen/AArch64/misched-fusion-csel.ll (+2-2) 
- (modified) llvm/test/CodeGen/AMDGPU/livevars-implicitdef.mir (+8-8) 
- (modified) llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-bundle.ll (+4-4) 
- (modified) llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.mir (+6-6) 
- (modified) llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-read.mir (+2-2) 
- (modified) llvm/test/CodeGen/AMDGPU/phi-elim-mli-available.mir (+9-9) 
- (modified) llvm/test/CodeGen/AMDGPU/phi-elimination-assertion.mir (+2-2) 
- (modified) llvm/test/CodeGen/AMDGPU/phi-elimination-end-cf.mir (+1-1) 
- (modified) llvm/test/CodeGen/AMDGPU/rewrite-mfma-form-spill-cost-reset.ll (+1-1) 
- (modified) llvm/test/CodeGen/AMDGPU/twoaddr-constrain.ll (+1-1) 
- (modified) llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll (+5-5) 
- (modified) llvm/test/CodeGen/AMDGPU/waterfall-loop-exec-update-terminator.mir (+26-26) 
- (modified) llvm/test/CodeGen/PowerPC/2013-07-01-PHIElimBug.mir (+1-1) 
- (modified) llvm/test/CodeGen/PowerPC/aix-cc-abi-mir.ll (+34-34) 
- (modified) llvm/test/CodeGen/PowerPC/aix-cc-byval-mir.ll (+4-4) 
- (modified) llvm/test/CodeGen/PowerPC/aix-cc-byval-split.ll (+1-1) 
- (modified) llvm/test/CodeGen/PowerPC/aix-vec-arg-spills-mir.ll (+2-2) 
- (modified) llvm/test/CodeGen/PowerPC/mflr-store.mir (+1-1) 
- (modified) llvm/test/CodeGen/SystemZ/regcoal_undefsrc.mir (+1-1) 
- (modified) llvm/test/CodeGen/X86/AMX/amx-greedy-ra.ll (+1-1) 
- (modified) llvm/test/CodeGen/X86/epilogue-cfi-fp.ll (+1-1) 
- (removed) llvm/test/CodeGen/X86/live-vars.ll (-27) 
- (modified) llvm/test/CodeGen/X86/lvi-hardening-gadget-graph.ll (+2-2) 
- (modified) llvm/test/CodeGen/X86/phi-elim-undef-livevars.mir (+4-4) 
- (modified) llvm/test/CodeGen/X86/pr58914.mir (+3-3) 
- (modified) llvm/test/CodeGen/X86/statepoint-cmp-sunk-past-statepoint.ll (+4-4) 
- (modified) llvm/test/CodeGen/X86/statepoint-ra.ll (+3-3) 
- (modified) llvm/test/CodeGen/X86/statepoint-vreg-invoke.ll (+2-2) 
- (modified) llvm/test/CodeGen/X86/statepoint-vreg-unlimited-tied-opnds.ll (+1-1) 
- (modified) llvm/test/CodeGen/X86/two-address-subreg-to-reg-kill.mir (+4-4) 
- (modified) llvm/unittests/MI/LiveIntervalTest.cpp (-64) 


``````````diff
diff --git a/llvm/include/llvm/CodeGen/LiveVariables.h b/llvm/include/llvm/CodeGen/LiveVariables.h
index 4b06c5b48335f..99fc2eadc1d22 100644
--- a/llvm/include/llvm/CodeGen/LiveVariables.h
+++ b/llvm/include/llvm/CodeGen/LiveVariables.h
@@ -6,22 +6,9 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// This file implements the LiveVariables analysis pass.  For each machine
-// instruction in the function, this pass calculates the set of registers that
-// are immediately dead after the instruction (i.e., the instruction calculates
-// the value, but it is never used) and the set of registers that are used by
-// the instruction, but are never used after the instruction (i.e., they are
-// killed).
-//
-// This class computes live variables using a sparse implementation based on
-// the machine code SSA form.  This class computes live variable information for
-// each virtual and _register allocatable_ physical register in a function.  It
-// uses the dominance properties of SSA form to efficiently compute live
-// variables for virtual registers, and assumes that physical registers are only
-// live within a single basic block (allowing it to do a single local analysis
-// to resolve physical register lifetimes in each basic block).  If a physical
-// register is not register allocatable, it is not tracked.  This is useful for
-// things like the stack pointer and condition codes.
+// This is a defunct analysis and should not be used. This pass should be
+// deleted. It's sole function is now to made adjustments to dead flags and
+// should be deleted once later passes are fixed.
 //
 //===----------------------------------------------------------------------===//
 
@@ -29,10 +16,7 @@
 #define LLVM_CODEGEN_LIVEVARIABLES_H
 
 #include "llvm/ADT/DenseMap.h"
-#include "llvm/ADT/IndexedMap.h"
-#include "llvm/ADT/SmallSet.h"
 #include "llvm/ADT/SmallVector.h"
-#include "llvm/ADT/SparseBitVector.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachinePassManager.h"
@@ -48,79 +32,6 @@ class MachineRegisterInfo;
 class LiveVariables {
   friend class LiveVariablesWrapperPass;
 
-public:
-  /// VarInfo - This represents the regions where a virtual register is live in
-  /// the program.  We represent this with three different pieces of
-  /// information: the set of blocks in which the instruction is live
-  /// throughout, the set of blocks in which the instruction is actually used,
-  /// and the set of non-phi instructions that are the last users of the value.
-  ///
-  /// In the common case where a value is defined and killed in the same block,
-  /// There is one killing instruction, and AliveBlocks is empty.
-  ///
-  /// Otherwise, the value is live out of the block.  If the value is live
-  /// throughout any blocks, these blocks are listed in AliveBlocks.  Blocks
-  /// where the liveness range ends are not included in AliveBlocks, instead
-  /// being captured by the Kills set.  In these blocks, the value is live into
-  /// the block (unless the value is defined and killed in the same block) and
-  /// lives until the specified instruction.  Note that there cannot ever be a
-  /// value whose Kills set contains two instructions from the same basic block.
-  ///
-  /// PHI nodes complicate things a bit.  If a PHI node is the last user of a
-  /// value in one of its predecessor blocks, it is not listed in the kills set,
-  /// but does include the predecessor block in the AliveBlocks set (unless that
-  /// block also defines the value).  This leads to the (perfectly sensical)
-  /// situation where a value is defined in a block, and the last use is a phi
-  /// node in the successor.  In this case, AliveBlocks is empty (the value is
-  /// not live across any  blocks) and Kills is empty (phi nodes are not
-  /// included). This is sensical because the value must be live to the end of
-  /// the block, but is not live in any successor blocks.
-  struct VarInfo {
-    /// AliveBlocks - Set of blocks in which this value is alive completely
-    /// through.  This is a bit set which uses the basic block number as an
-    /// index.
-    ///
-    SparseBitVector<> AliveBlocks;
-
-    /// Kills - List of MachineInstruction's which are the last use of this
-    /// virtual register (kill it) in their basic block.
-    ///
-    std::vector<MachineInstr*> Kills;
-
-    /// removeKill - Delete a kill corresponding to the specified
-    /// machine instruction. Returns true if there was a kill
-    /// corresponding to this instruction, false otherwise.
-    bool removeKill(MachineInstr &MI) {
-      std::vector<MachineInstr *>::iterator I = find(Kills, &MI);
-      if (I == Kills.end())
-        return false;
-      Kills.erase(I);
-      return true;
-    }
-
-    /// findKill - Find a kill instruction in MBB. Return NULL if none is found.
-    LLVM_ABI MachineInstr *findKill(const MachineBasicBlock *MBB) const;
-
-    /// isLiveIn - Is Reg live in to MBB? This means that Reg is live through
-    /// MBB, or it is killed in MBB. If Reg is only used by PHI instructions in
-    /// MBB, it is not considered live in.
-    LLVM_ABI bool isLiveIn(const MachineBasicBlock &MBB, Register Reg,
-                           MachineRegisterInfo &MRI);
-
-    LLVM_ABI void print(raw_ostream &OS) const;
-
-    LLVM_ABI void dump() const;
-  };
-
-private:
-  /// VirtRegInfo - This list is a mapping from virtual register number to
-  /// variable information.
-  ///
-  IndexedMap<VarInfo, VirtReg2IndexFunctor> VirtRegInfo;
-
-private:   // Intermediate data structures
-  MachineFunction *MF = nullptr;
-
   MachineRegisterInfo *MRI = nullptr;
 
   const TargetRegisterInfo *TRI = nullptr;
@@ -135,8 +46,6 @@ class LiveVariables {
   // register references are presumed dead across basic blocks.
   std::vector<MachineInstr *> PhysRegUse;
 
-  std::vector<SmallVector<Register, 4>> PHIVarInfo;
-
   // DistanceMap - Keep track the distance of a MI from the start of the
   // current basic block.
   DenseMap<MachineInstr*, unsigned> DistanceMap;
@@ -146,10 +55,10 @@ class LiveVariables {
 
   LLVM_ABI void analyze(MachineFunction &MF);
 
-  /// HandlePhysRegKill - Add kills of Reg and its sub-registers to the
-  /// uses. Pay special attention to the sub-register uses which may come below
-  /// the last use of the whole register.
-  bool HandlePhysRegKill(Register Reg, MachineInstr *MI);
+  /// HandlePhysRegKill - Mark the last def of Reg and its sub-registers dead
+  /// if they are not used. Pay special attention to the sub-register uses
+  /// which may come below the last use of the whole register.
+  void HandlePhysRegKill(Register Reg, MachineInstr *MI);
 
   /// HandleRegMask - Call HandlePhysRegKill for all registers clobbered by Mask.
   void HandleRegMask(const MachineOperand &, unsigned);
@@ -167,12 +76,6 @@ class LiveVariables {
   /// register.
   MachineInstr *FindLastPartialDef(Register Reg);
 
-  /// analyzePHINodes - Gather information about the PHI nodes in here. In
-  /// particular, we want to map the variable information of a virtual
-  /// register which is used in a PHI node. We map that to the BB the vreg
-  /// is coming from.
-  void analyzePHINodes(const MachineFunction& Fn);
-
   void runOnInstr(MachineInstr &MI, SmallVectorImpl<Register> &Defs,
                   unsigned NumRegs);
 
@@ -180,119 +83,6 @@ class LiveVariables {
 
 public:
   LLVM_ABI LiveVariables(MachineFunction &MF);
-
-  LLVM_ABI void print(raw_ostream &OS) const;
-
-  //===--------------------------------------------------------------------===//
-  //  API to update live variable information
-
-  /// Recompute liveness from scratch for a virtual register \p Reg that is
-  /// known to have a single def that dominates all uses. This can be useful
-  /// after removing some uses of \p Reg. It is not necessary for the whole
-  /// machine function to be in SSA form.
-  LLVM_ABI void recomputeForSingleDefVirtReg(Register Reg);
-
-  /// addVirtualRegisterKilled - Add information about the fact that the
-  /// specified register is killed after being used by the specified
-  /// instruction. If AddIfNotFound is true, add a implicit operand if it's
-  /// not found.
-  void addVirtualRegisterKilled(Register IncomingReg, MachineInstr &MI,
-                                bool AddIfNotFound = false) {
-    if (MI.addRegisterKilled(IncomingReg, TRI, AddIfNotFound))
-      getVarInfo(IncomingReg).Kills.push_back(&MI);
-  }
-
-  /// removeVirtualRegisterKilled - Remove the specified kill of the virtual
-  /// register from the live variable information. Returns true if the
-  /// variable was marked as killed by the specified instruction,
-  /// false otherwise.
-  bool removeVirtualRegisterKilled(Register Reg, MachineInstr &MI) {
-    if (!getVarInfo(Reg).removeKill(MI))
-      return false;
-
-    bool Removed = false;
-    for (MachineOperand &MO : MI.operands()) {
-      if (MO.isReg() && MO.isKill() && MO.getReg() == Reg) {
-        MO.setIsKill(false);
-        Removed = true;
-        break;
-      }
-    }
-
-    assert(Removed && "Register is not used by this instruction!");
-    (void)Removed;
-    return true;
-  }
-
-  /// removeVirtualRegistersKilled - Remove all killed info for the specified
-  /// instruction.
-  LLVM_ABI void removeVirtualRegistersKilled(MachineInstr &MI);
-
-  /// addVirtualRegisterDead - Add information about the fact that the specified
-  /// register is dead after being used by the specified instruction. If
-  /// AddIfNotFound is true, add a implicit operand if it's not found.
-  void addVirtualRegisterDead(Register IncomingReg, MachineInstr &MI,
-                              bool AddIfNotFound = false) {
-    if (MI.addRegisterDead(IncomingReg, TRI, AddIfNotFound))
-      getVarInfo(IncomingReg).Kills.push_back(&MI);
-  }
-
-  /// removeVirtualRegisterDead - Remove the specified kill of the virtual
-  /// register from the live variable information. Returns true if the
-  /// variable was marked dead at the specified instruction, false
-  /// otherwise.
-  bool removeVirtualRegisterDead(Register Reg, MachineInstr &MI) {
-    if (!getVarInfo(Reg).removeKill(MI))
-      return false;
-
-    bool Removed = false;
-    for (MachineOperand &MO : MI.all_defs()) {
-      if (MO.getReg() == Reg) {
-        MO.setIsDead(false);
-        Removed = true;
-        break;
-      }
-    }
-    assert(Removed && "Register is not defined by this instruction!");
-    (void)Removed;
-    return true;
-  }
-
-  /// getVarInfo - Return the VarInfo structure for the specified VIRTUAL
-  /// register.
-  LLVM_ABI VarInfo &getVarInfo(Register Reg);
-
-  LLVM_ABI void MarkVirtRegAliveInBlock(VarInfo &VRInfo,
-                                        MachineBasicBlock *DefBlock,
-                                        MachineBasicBlock *BB);
-  LLVM_ABI void
-  MarkVirtRegAliveInBlock(VarInfo &VRInfo, MachineBasicBlock *DefBlock,
-                          MachineBasicBlock *BB,
-                          SmallVectorImpl<MachineBasicBlock *> &WorkList);
-
-  LLVM_ABI void HandleVirtRegDef(Register reg, MachineInstr &MI);
-  LLVM_ABI void HandleVirtRegUse(Register reg, MachineBasicBlock *MBB,
-                                 MachineInstr &MI);
-
-  bool isLiveIn(Register Reg, const MachineBasicBlock &MBB) {
-    return getVarInfo(Reg).isLiveIn(MBB, Reg, *MRI);
-  }
-
-  /// isLiveOut - Determine if Reg is live out from MBB, when not considering
-  /// PHI nodes. This means that Reg is either killed by a successor block or
-  /// passed through one.
-  LLVM_ABI bool isLiveOut(Register Reg, const MachineBasicBlock &MBB);
-
-  /// addNewBlock - Add a new basic block BB between DomBB and SuccBB. All
-  /// variables that are live out of DomBB and live into SuccBB will be marked
-  /// as passing live through BB. This method assumes that the machine code is
-  /// still in SSA form.
-  LLVM_ABI void addNewBlock(MachineBasicBlock *BB, MachineBasicBlock *DomBB,
-                            MachineBasicBlock *SuccBB);
-
-  LLVM_ABI void addNewBlock(MachineBasicBlock *BB, MachineBasicBlock *DomBB,
-                            MachineBasicBlock *SuccBB,
-                            std::vector<SparseBitVector<>> &LiveInSets);
 };
 
 class LiveVariablesAnalysis : public AnalysisInfoMixin<LiveVariablesAnalysis> {
@@ -304,16 +94,6 @@ class LiveVariablesAnalysis : public AnalysisInfoMixin<LiveVariablesAnalysis> {
   LLVM_ABI Result run(MachineFunction &MF, MachineFunctionAnalysisManager &);
 };
 
-class LiveVariablesPrinterPass
-    : public RequiredPassInfoMixin<LiveVariablesPrinterPass> {
-  raw_ostream &OS;
-
-public:
-  explicit LiveVariablesPrinterPass(raw_ostream &OS) : OS(OS) {}
-  LLVM_ABI PreservedAnalyses run(MachineFunction &MF,
-                                 MachineFunctionAnalysisManager &MFAM);
-};
-
 class LLVM_ABI LiveVariablesWrapperPass : public MachineFunctionPass {
   LiveVariables LV;
 
@@ -328,10 +108,6 @@ class LLVM_ABI LiveVariablesWrapperPass : public MachineFunctionPass {
   }
 
   void getAnalysisUsage(AnalysisUsage &AU) const override;
-
-  void releaseMemory() override { LV.VirtRegInfo.clear(); }
-
-  LiveVariables &getLV() { return LV; }
 };
 
 } // End llvm namespace
diff --git a/llvm/include/llvm/CodeGen/Passes.h b/llvm/include/llvm/CodeGen/Passes.h
index 4eef016b0ee0a..95f95170456c8 100644
--- a/llvm/include/llvm/CodeGen/Passes.h
+++ b/llvm/include/llvm/CodeGen/Passes.h
@@ -150,8 +150,7 @@ LLVM_ABI extern char &MachineRegionInfoPassID;
 /// EdgeBundles analysis - Bundle machine CFG edges.
 LLVM_ABI extern char &EdgeBundlesWrapperLegacyID;
 
-/// LiveVariables pass - This pass computes the set of blocks in which each
-/// variable is life and sets machine operand kill flags.
+/// LiveVariables pass - This pass sets dead flags on register definitions.
 LLVM_ABI extern char &LiveVariablesID;
 
 /// PHIElimination - This pass eliminates machine instruction PHI nodes
diff --git a/llvm/include/llvm/CodeGen/TargetInstrInfo.h b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
index 3191b9e50a86d..e1fb7ef33de0f 100644
--- a/llvm/include/llvm/CodeGen/TargetInstrInfo.h
+++ b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
@@ -44,7 +44,6 @@ namespace llvm {
 class DFAPacketizer;
 class InstrItineraryData;
 class LiveIntervals;
-class LiveVariables;
 class MachineCycleInfo;
 class MachineLoop;
 class MachineLoopInfo;
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def b/llvm/include/llvm/Passes/MachinePassRegistry.def
index 8713a4b6d26fd..ed582f2f61c65 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -119,7 +119,6 @@ MACHINE_FUNCTION_PASS("print<gisel-value-tracking>",
 MACHINE_FUNCTION_PASS("print<livedebugvars>", LiveDebugVariablesPrinterPass(errs()))
 MACHINE_FUNCTION_PASS("print<live-intervals>", LiveIntervalsPrinterPass(errs()))
 MACHINE_FUNCTION_PASS("print<live-stacks>", LiveStacksPrinterPass(errs()))
-MACHINE_FUNCTION_PASS("print<live-vars>", LiveVariablesPrinterPass(errs()))
 MACHINE_FUNCTION_PASS("print<machine-block-freq>",
                       MachineBlockFrequencyPrinterPass(errs()))
 MACHINE_FUNCTION_PASS("print<machine-block-hash>",
diff --git a/llvm/lib/CodeGen/LiveVariables.cpp b/llvm/lib/CodeGen/LiveVariables.cpp
index 5ce12c481bf16..af2ea6f9b8245 100644
--- a/llvm/lib/CodeGen/LiveVariables.cpp
+++ b/llvm/lib/CodeGen/LiveVariables.cpp
@@ -6,39 +6,27 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// This file implements the LiveVariable analysis pass.  For each machine
-// instruction in the function, this pass calculates the set of registers that
-// are immediately dead after the instruction (i.e., the instruction calculates
-// the value, but it is never used) and the set of registers that are used by
-// the instruction, but are never used after the instruction (i.e., they are
-// killed).
+// This file implements the LiveVariable pass. For each machine instruction in
+// the function, this pass marks the registers that are immediately dead after
+// the instruction (i.e., the instruction calculates the value, but it is never
+// used). It does not compute kill flags or any queryable liveness information.
 //
-// This class computes live variables using a sparse implementation based on
-// the machine code SSA form.  This class computes live variable information for
-// each virtual and _register allocatable_ physical register in a function.  It
-// uses the dominance properties of SSA form to efficiently compute live
-// variables for virtual registers, and assumes that physical registers are only
-// live within a single basic block (allowing it to do a single local analysis
-// to resolve physical register lifetimes in each basic block).  If a physical
-// register is not register allocatable, it is not tracked.  This is useful for
-// things like the stack pointer and condition codes.
+// A virtual register def is dead if the register has no reading uses. Physical
+// registers are assumed to only be live within a single basic block, and are
+// resolved with a local analysis of each block. This also adds implicit defs of
+// sub-registers and super-registers to model partially dead physical register
+// definitions. Reserved physical registers are not tracked.
 //
 //===----------------------------------------------------------------------===//
 
 #include "llvm/CodeGen/LiveVariables.h"
-#include "llvm/ADT/DenseSet.h"
-#include "llvm/ADT/DepthFirstIterator.h"
 #include "llvm/ADT/STLExtras.h"
-#include "llvm/ADT/SmallPtrSet.h"
 #include "llvm/ADT/SmallSet.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/Passes.h"
-#include "llvm/Config/llvm-config.h"
 #include "llvm/InitializePasses.h"
-#include "llvm/Support/Debug.h"
 #include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/raw_ostream.h"
 using namespace llvm;
 
 AnalysisKey LiveVariablesAnalysis::Key;
@@ -49,14 +37,6 @@ LiveVariablesAnalysis::run(MachineFunction &MF,
   return Result(MF);
 }
 
-PreservedAnalyses
-LiveVariablesPrinterPass::run(MachineFunction &MF,
-                              MachineFunctionAnalysisManager &MFAM) {
-  OS << "Live variables in machine function: " << MF.getName() << '\n';
-  MFAM.getResult<LiveVariablesAnalysis>(MF).print(OS);
-  return PreservedAnalyses::all();
-}
-
 char LiveVariablesWrapperPass::ID = 0;
 char &llvm::LiveVariablesID = LiveVariablesWrapperPass::ID;
 INITIALIZE_PASS_BEGIN(LiveVariablesWrapperPass, "livevars",
@@ -71,147 +51,7 @@ void LiveVariablesWrapperPass::getAnalysisUsage(AnalysisUsage &AU) const {
   MachineFunctionPass::getAnalysisUsage(AU);
 }
 
-LiveVariables::LiveVariables(MachineFunction &MF)
-    : MF(&MF), MRI(&MF.getRegInfo()), TRI(MF.getSubtarget().getRegisterInfo()) {
-  analyze(MF);
-}
-
-void LiveVariables::print(raw_ostream &OS) const {
-  for (size_t I = 0, E = VirtRegInfo.size(); I != E; ++I) {
-    const Register Reg = Register::index2VirtReg(I);
-    OS << "Virtual register '%" << I << "':\n";
-    VirtRegInfo[Reg].print(OS);
-  }
-}
-
-MachineInstr *
-LiveVariables::VarInfo::findKill(const MachineBasicBlock *MBB) const {
-  for (MachineInstr *MI : Kills)
-    if (MI->getParent() == MBB)
-      return MI;
-  return nullptr;
-}
-
-void LiveVariables::VarInfo::print(raw_ostream &OS) const {
-  OS << "  Alive in blocks: ";
-  for (unsigned AB : AliveBlocks)
-    OS << AB << ", ";
-  OS << "\n  Killed by:";
-  if (Kills.empty())
-    OS << " No instructions.\n\n";
-  else {
-    for (unsigned i = 0, e = Kills.size(); i != e; ++i)
-      OS << "\n    #" << i << ": " << *Kills[i];
-    OS << "\n";
-  }
-}
-
-#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
-LLVM_DUMP_METHOD void LiveVariables::VarInfo::dump() const { print(dbgs()); }
-#endif
-
-/// getVarInfo - Get (possibly creating) a VarInfo object for the given vreg.
-LiveVariables::VarInfo &LiveVariables::getVarInfo(Register Reg) {
-  assert(Reg.isVirtual() && "getVarInfo: not a virtual register!");
-  VirtRegInfo.grow(Reg);
-  return VirtRegInfo[Reg];
-}
-
-void LiveVariables::MarkVirtRegAliveInBlock(
-    VarInfo &VRInfo, MachineBasicBlock *DefBlock, MachineBasicBlock *MBB,
-    SmallVectorImpl<MachineBasicBlock *> &WorkList) {
-  unsigned BBNum = MBB->getNumber();
-
-  // Check to see if this basic block is...
[truncated]

``````````

</details>


https://github.com/llvm/llvm-project/pull/230149


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