[llvm-branch-commits] [llvm] [NFC][AMDGPU] Create tables for async-related intrinsics (PR #225488)

[Sameer Sahasrabuddhe via llvm-branch-commits]

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@@ -40,6 +40,25 @@ class AMDGPURsrcIntrinsic<int rsrcarg, bit isimage = false> {
   bit IsImage = isimage;
 }
 
+// Marker classes for asynchronous operations.
+class AMDGPUAsyncIntrinsic {
+  Intrinsic Intr = !cast<Intrinsic>(NAME);
+}
+
+// DMA transfers between global memory and LDS.
+class AMDGPULDSDMAIntrinsic : AMDGPUAsyncIntrinsic;
+
+// DMA transfers between global memory and LDS tracked with asyncmarks.
+class AMDGPUAsyncLDSDMAIntrinsic : AMDGPUAsyncIntrinsic;
+
+// Operation tracked by ASYNCcnt.
+class AMDGPUAsyncCntIntrinsic : AMDGPUAsyncIntrinsic;
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ssahasra wrote:

Why would there be intrinsics that are tracked by a raw count, but not by an asyncmark?

https://github.com/llvm/llvm-project/pull/225488