[llvm-branch-commits] [llvm] [NFC][AMDGPU] Create tables for async-related intrinsics (PR #225488)

[Sameer Sahasrabuddhe via llvm-branch-commits]

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@@ -2897,8 +2924,8 @@ class AMDGPULoadToLDS :
      NoCapture<ArgIndex<1>>, WriteOnly<ArgIndex<1>>,
      ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>, IntrNoCallback, IntrNoFree],
      "", [SDNPMemOperand]>;
-def int_amdgcn_load_to_lds : AMDGPULoadToLDS;
-def int_amdgcn_load_async_to_lds : AMDGPULoadToLDS;
+def int_amdgcn_load_to_lds : AMDGPULoadToLDS, AMDGPULDSDMAIntrinsic;
+def int_amdgcn_load_async_to_lds : AMDGPULoadToLDS, AMDGPUAsyncLDSDMAIntrinsic;
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ssahasra wrote:

Same comment here ... every load-to-lds is already an LDS DMA? Also, here the gap in naming becomes more obvious. Presumably the intention is to separate async intrinsics from non-async intrinsics. Then the class name AMDGPULDSDMAIntrinsic isn't conveying any new information.

https://github.com/llvm/llvm-project/pull/225488