[llvm-branch-commits] [llvm] AMDGPU: Migrate unittests to subarch triples (PR #206486)
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Mon Jun 29 06:18:14 PDT 2026
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<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-transforms
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
<details>
<summary>Changes</summary>
Replace specifying a processor name with the triple
subarch.
The register-limit helpers in AMDGPUUnitTests.cpp that enumerate every
valid CPU via fillValidArchListAMDGCN still pass the CPU explicitly, as
does the MC Disassembler smoke test (its C disassembler API derives the
subtarget from the CPU, not the triple subarch).
Co-authored-by: Claude (Opus 4.8) <noreply@<!-- -->anthropic.com>
---
Full diff: https://github.com/llvm/llvm-project/pull/206486.diff
16 Files Affected:
- (modified) llvm/unittests/CodeGen/AMDGPUMetadataTest.cpp (+3-3)
- (modified) llvm/unittests/CodeGen/GlobalISel/GISelMITest.cpp (+2-2)
- (modified) llvm/unittests/CodeGen/RematerializerTest.cpp (+1-1)
- (modified) llvm/unittests/MC/AMDGPU/Disassembler.cpp (+2-2)
- (modified) llvm/unittests/MC/AMDGPU/DwarfRegMappings.cpp (+6-6)
- (modified) llvm/unittests/MI/LiveIntervalTest.cpp (+2-2)
- (modified) llvm/unittests/MIR/MachineMetadata.cpp (+2-2)
- (modified) llvm/unittests/Target/AMDGPU/AMDGPUMCExprTest.cpp (+1-1)
- (modified) llvm/unittests/Target/AMDGPU/AMDGPUUnitTests.cpp (+2-2)
- (modified) llvm/unittests/Target/AMDGPU/CSETest.cpp (+1-1)
- (modified) llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp (+6-6)
- (modified) llvm/unittests/Target/AMDGPU/ExecMayBeModifiedBeforeAnyUse.cpp (+1-1)
- (modified) llvm/unittests/Target/AMDGPU/GCNRegPressureTest.cpp (+1-1)
- (modified) llvm/unittests/Target/AMDGPU/LiveRegUnits.cpp (+1-1)
- (modified) llvm/unittests/Target/AMDGPU/PALMetadata.cpp (+1-1)
- (modified) llvm/unittests/Target/AMDGPU/UniformityAnalysisTest.cpp (+1-1)
``````````diff
diff --git a/llvm/unittests/CodeGen/AMDGPUMetadataTest.cpp b/llvm/unittests/CodeGen/AMDGPUMetadataTest.cpp
index 7f53f5322f548..08a32390140d6 100644
--- a/llvm/unittests/CodeGen/AMDGPUMetadataTest.cpp
+++ b/llvm/unittests/CodeGen/AMDGPUMetadataTest.cpp
@@ -52,14 +52,14 @@ class AMDGPUSelectionDAGTest : public testing::Test {
void SetUp() override {
std::string Error;
- Triple TargetTriple("amdgcn--amdpal");
+ Triple TargetTriple("amdgpu10.10--amdpal");
const Target *T = TargetRegistry::lookupTarget(TargetTriple, Error);
if (!T)
GTEST_SKIP();
TargetOptions Options;
- TM = std::unique_ptr<TargetMachine>(T->createTargetMachine(
- TargetTriple, "gfx1010", "", Options, std::nullopt));
+ TM = std::unique_ptr<TargetMachine>(
+ T->createTargetMachine(TargetTriple, "", "", Options, std::nullopt));
if (!TM)
GTEST_SKIP();
diff --git a/llvm/unittests/CodeGen/GlobalISel/GISelMITest.cpp b/llvm/unittests/CodeGen/GlobalISel/GISelMITest.cpp
index 19b3161dd0313..da3714a620b90 100644
--- a/llvm/unittests/CodeGen/GlobalISel/GISelMITest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/GISelMITest.cpp
@@ -67,7 +67,7 @@ body: |
}
std::unique_ptr<TargetMachine> AMDGPUGISelMITest::createTargetMachine() const {
- Triple TargetTriple("amdgcn-amd-amdhsa");
+ Triple TargetTriple("amdgpu9.00-amd-amdhsa");
std::string Error;
const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error);
if (!T)
@@ -75,7 +75,7 @@ std::unique_ptr<TargetMachine> AMDGPUGISelMITest::createTargetMachine() const {
TargetOptions Options;
return std::unique_ptr<TargetMachine>(
- T->createTargetMachine(TargetTriple, "gfx900", "", Options, std::nullopt,
+ T->createTargetMachine(TargetTriple, "", "", Options, std::nullopt,
std::nullopt, CodeGenOptLevel::Aggressive));
}
diff --git a/llvm/unittests/CodeGen/RematerializerTest.cpp b/llvm/unittests/CodeGen/RematerializerTest.cpp
index b29f06ca83892..b37760a57580e 100644
--- a/llvm/unittests/CodeGen/RematerializerTest.cpp
+++ b/llvm/unittests/CodeGen/RematerializerTest.cpp
@@ -102,7 +102,7 @@ class RematerializerTest : public CodeGenTestBase {
#endif
}
- void SetUp() override { setUpImpl("amdgcn--", "gfx950", ""); }
+ void SetUp() override { setUpImpl("amdgpu9.50--", "", ""); }
using RematerializerTestFn = std::function<void(RematerializerWrapper &RW)>;
diff --git a/llvm/unittests/MC/AMDGPU/Disassembler.cpp b/llvm/unittests/MC/AMDGPU/Disassembler.cpp
index a6c4b98915aca..c0017f79427cc 100644
--- a/llvm/unittests/MC/AMDGPU/Disassembler.cpp
+++ b/llvm/unittests/MC/AMDGPU/Disassembler.cpp
@@ -32,8 +32,8 @@ static const char *symbolLookupCallback(void *DisInfo, uint64_t ReferenceValue,
return nullptr;
}
-static constexpr char TripleName[] = "amdgcn--amdpal";
-static constexpr char CPUName[] = "gfx1030";
+static constexpr char TripleName[] = "amdgpu10.30--amdpal";
+static constexpr char CPUName[] = "";
// Basic smoke test.
TEST(AMDGPUDisassembler, Basic) {
diff --git a/llvm/unittests/MC/AMDGPU/DwarfRegMappings.cpp b/llvm/unittests/MC/AMDGPU/DwarfRegMappings.cpp
index 4edd0f1227378..2123eefed347a 100644
--- a/llvm/unittests/MC/AMDGPU/DwarfRegMappings.cpp
+++ b/llvm/unittests/MC/AMDGPU/DwarfRegMappings.cpp
@@ -43,9 +43,9 @@ createTargetMachine(std::string TStr, StringRef CPU, StringRef FS) {
}
TEST(AMDGPUDwarfRegMappingTests, TestWave64DwarfRegMapping) {
- for (auto Triple :
- {"amdgcn-amd-", "amdgcn-amd-amdhsa", "amdgcn-amd-amdpal"}) {
- auto TM = createTargetMachine(Triple, "gfx1010", "+wavefrontsize64");
+ for (auto Triple : {"amdgpu10.10-amd-", "amdgpu10.10-amd-amdhsa",
+ "amdgpu10.10-amd-amdpal"}) {
+ auto TM = createTargetMachine(Triple, "", "+wavefrontsize64");
if (TM) {
const auto &MRI = TM->getMCRegisterInfo();
// Wave64 Dwarf register mapping test numbers
@@ -63,9 +63,9 @@ TEST(AMDGPUDwarfRegMappingTests, TestWave64DwarfRegMapping) {
}
TEST(AMDGPUDwarfRegMappingTests, TestWave32DwarfRegMapping) {
- for (auto Triple :
- {"amdgcn-amd-", "amdgcn-amd-amdhsa", "amdgcn-amd-amdpal"}) {
- auto TM = createTargetMachine(Triple, "gfx1010", "+wavefrontsize32");
+ for (auto Triple : {"amdgpu10.10-amd-", "amdgpu10.10-amd-amdhsa",
+ "amdgpu10.10-amd-amdpal"}) {
+ auto TM = createTargetMachine(Triple, "", "+wavefrontsize32");
if (TM) {
const auto &MRI = TM->getMCRegisterInfo();
// Wave32 Dwarf register mapping test numbers
diff --git a/llvm/unittests/MI/LiveIntervalTest.cpp b/llvm/unittests/MI/LiveIntervalTest.cpp
index 45b8aeb72b598..0581d84fd0709 100644
--- a/llvm/unittests/MI/LiveIntervalTest.cpp
+++ b/llvm/unittests/MI/LiveIntervalTest.cpp
@@ -42,7 +42,7 @@ void initLLVM() {
/// unittests, we go for "AMDGPU" to be able to test normal and subregister
/// liveranges.
std::unique_ptr<TargetMachine> createTargetMachine() {
- Triple TargetTriple("amdgcn--");
+ Triple TargetTriple("amdgpu9.00--");
std::string Error;
const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error);
if (!T)
@@ -50,7 +50,7 @@ std::unique_ptr<TargetMachine> createTargetMachine() {
TargetOptions Options;
return std::unique_ptr<TargetMachine>(
- T->createTargetMachine(TargetTriple, "gfx900", "", Options, std::nullopt,
+ T->createTargetMachine(TargetTriple, "", "", Options, std::nullopt,
std::nullopt, CodeGenOptLevel::Aggressive));
}
diff --git a/llvm/unittests/MIR/MachineMetadata.cpp b/llvm/unittests/MIR/MachineMetadata.cpp
index 8960a3a107d10..f58a3cac1bb0f 100644
--- a/llvm/unittests/MIR/MachineMetadata.cpp
+++ b/llvm/unittests/MIR/MachineMetadata.cpp
@@ -441,8 +441,8 @@ CHECK: %1:gr32 = MOV32rm %0, 1, $noreg, 0, $noreg :: (load (s32) from %ir.p, !al
}
TEST_F(MachineMetadataTest, MMSlotTrackerAMDGPU) {
- auto TM = createTargetMachine(Triple::normalize("amdgcn-amd-amdhsa"),
- "gfx1010", "");
+ auto TM =
+ createTargetMachine(Triple::normalize("amdgpu10.10-amd-amdhsa"), "", "");
if (!TM)
GTEST_SKIP();
diff --git a/llvm/unittests/Target/AMDGPU/AMDGPUMCExprTest.cpp b/llvm/unittests/Target/AMDGPU/AMDGPUMCExprTest.cpp
index 86c296feed792..83b47531a96fb 100644
--- a/llvm/unittests/Target/AMDGPU/AMDGPUMCExprTest.cpp
+++ b/llvm/unittests/Target/AMDGPU/AMDGPUMCExprTest.cpp
@@ -31,7 +31,7 @@ class AMDGPUMCExprTest : public AMDGPUTestBase {
AMDGPUMCExprTest() {
- TM = createAMDGPUTargetMachine("amdgcn--amdpal", "gfx1010", "");
+ TM = createAMDGPUTargetMachine("amdgpu10.10--amdpal", "", "");
LLVMCtx = std::make_unique<LLVMContext>();
M = std::make_unique<Module>("Module", *LLVMCtx);
diff --git a/llvm/unittests/Target/AMDGPU/AMDGPUUnitTests.cpp b/llvm/unittests/Target/AMDGPU/AMDGPUUnitTests.cpp
index d1570e3986188..9bb526e7c85f5 100644
--- a/llvm/unittests/Target/AMDGPU/AMDGPUUnitTests.cpp
+++ b/llvm/unittests/Target/AMDGPU/AMDGPUUnitTests.cpp
@@ -275,7 +275,7 @@ static const char *printSubReg(const TargetRegisterInfo &TRI, unsigned SubReg) {
}
TEST_F(AMDGPUTestBase, TestReverseComposeSubRegIndices) {
- auto TM = createAMDGPUTargetMachine("amdgcn-amd-", "gfx900", "");
+ auto TM = createAMDGPUTargetMachine("amdgpu9.00-amd-", "", "");
if (!TM)
return;
GCNSubtarget ST(TM->getTargetTriple(), std::string(TM->getTargetCPU()),
@@ -352,7 +352,7 @@ TEST_F(AMDGPUTestBase, TestReverseComposeSubRegIndices) {
TEST_F(AMDGPUTestBase, TestGetNamedOperandIdx) {
std::unique_ptr<const GCNTargetMachine> TM =
- createAMDGPUTargetMachine("amdgcn-amd-", "gfx900", "");
+ createAMDGPUTargetMachine("amdgpu9.00-amd-", "", "");
if (!TM)
return;
const MCInstrInfo *MCII = TM->getMCInstrInfo();
diff --git a/llvm/unittests/Target/AMDGPU/CSETest.cpp b/llvm/unittests/Target/AMDGPU/CSETest.cpp
index 382f23906e92d..a302a3e372d45 100644
--- a/llvm/unittests/Target/AMDGPU/CSETest.cpp
+++ b/llvm/unittests/Target/AMDGPU/CSETest.cpp
@@ -16,7 +16,7 @@
using namespace llvm;
TEST_F(AMDGPUTestBase, TestCSEForRegisterClassOrBankAndLLT) {
- auto TM = createAMDGPUTargetMachine("amdgcn-amd-", "gfx1100", "");
+ auto TM = createAMDGPUTargetMachine("amdgpu11.00-amd-", "", "");
if (!TM)
GTEST_SKIP();
diff --git a/llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp b/llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp
index ec8ed7f15b35a..fe3cafe270fbe 100644
--- a/llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp
+++ b/llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp
@@ -13,9 +13,9 @@
using namespace llvm;
TEST_F(AMDGPUTestBase, TestWave64DwarfRegMapping) {
- for (auto Triple :
- {"amdgcn-amd-", "amdgcn-amd-amdhsa", "amdgcn-amd-amdpal"}) {
- auto TM = createAMDGPUTargetMachine(Triple, "gfx1010", "+wavefrontsize64");
+ for (auto Triple : {"amdgpu10.10-amd-", "amdgpu10.10-amd-amdhsa",
+ "amdgpu10.10-amd-amdpal"}) {
+ auto TM = createAMDGPUTargetMachine(Triple, "", "+wavefrontsize64");
if (TM) {
GCNSubtarget ST(TM->getTargetTriple(), std::string(TM->getTargetCPU()),
std::string(TM->getTargetFeatureString()), *TM);
@@ -53,9 +53,9 @@ TEST_F(AMDGPUTestBase, TestWave64DwarfRegMapping) {
}
TEST_F(AMDGPUTestBase, TestWave32DwarfRegMapping) {
- for (auto Triple :
- {"amdgcn-amd-", "amdgcn-amd-amdhsa", "amdgcn-amd-amdpal"}) {
- auto TM = createAMDGPUTargetMachine(Triple, "gfx1010", "+wavefrontsize32");
+ for (auto Triple : {"amdgpu10.10-amd-", "amdgpu10.10-amd-amdhsa",
+ "amdgpu10.10-amd-amdpal"}) {
+ auto TM = createAMDGPUTargetMachine(Triple, "", "+wavefrontsize32");
if (TM) {
GCNSubtarget ST(TM->getTargetTriple(), std::string(TM->getTargetCPU()),
std::string(TM->getTargetFeatureString()), *TM);
diff --git a/llvm/unittests/Target/AMDGPU/ExecMayBeModifiedBeforeAnyUse.cpp b/llvm/unittests/Target/AMDGPU/ExecMayBeModifiedBeforeAnyUse.cpp
index 8034bf6561d86..4f02ab9e482a3 100644
--- a/llvm/unittests/Target/AMDGPU/ExecMayBeModifiedBeforeAnyUse.cpp
+++ b/llvm/unittests/Target/AMDGPU/ExecMayBeModifiedBeforeAnyUse.cpp
@@ -14,7 +14,7 @@
using namespace llvm;
TEST_F(AMDGPUTestBase, ExecMayBeModifiedBeforeAnyUse) {
- auto TM = createAMDGPUTargetMachine("amdgcn-amd-", "gfx906", "");
+ auto TM = createAMDGPUTargetMachine("amdgpu9.06-amd-", "", "");
if (!TM)
GTEST_SKIP();
diff --git a/llvm/unittests/Target/AMDGPU/GCNRegPressureTest.cpp b/llvm/unittests/Target/AMDGPU/GCNRegPressureTest.cpp
index d907ee269a448..c0acf9e7dde4f 100644
--- a/llvm/unittests/Target/AMDGPU/GCNRegPressureTest.cpp
+++ b/llvm/unittests/Target/AMDGPU/GCNRegPressureTest.cpp
@@ -22,7 +22,7 @@ using namespace llvm;
class GCNRegPressureTest : public llvm::CodeGenTestBase {
public:
- void SetUp() override { setUpImpl("amdgcn--", "gfx908", ""); }
+ void SetUp() override { setUpImpl("amdgpu9.08--", "", ""); }
};
TEST_F(GCNRegPressureTest, DownwardTrackerEndOnDbgVal) {
diff --git a/llvm/unittests/Target/AMDGPU/LiveRegUnits.cpp b/llvm/unittests/Target/AMDGPU/LiveRegUnits.cpp
index ec3d465891467..0cd41faf6e5ad 100644
--- a/llvm/unittests/Target/AMDGPU/LiveRegUnits.cpp
+++ b/llvm/unittests/Target/AMDGPU/LiveRegUnits.cpp
@@ -18,7 +18,7 @@ using namespace llvm;
class LiveRegUnitsTest : public AMDGPUCodeGenTestBase {
public:
- void SetUp() override { setUpImpl("amdgcn-amd-", "gfx1200", ""); }
+ void SetUp() override { setUpImpl("amdgpu12.00-amd-", "", ""); }
};
TEST_F(LiveRegUnitsTest, TestVGPRBlockLoadStore) {
diff --git a/llvm/unittests/Target/AMDGPU/PALMetadata.cpp b/llvm/unittests/Target/AMDGPU/PALMetadata.cpp
index 64537921ec4a6..38d3f8b37cce2 100644
--- a/llvm/unittests/Target/AMDGPU/PALMetadata.cpp
+++ b/llvm/unittests/Target/AMDGPU/PALMetadata.cpp
@@ -34,7 +34,7 @@ class PALMetadata : public AMDGPUTestBase {
AMDGPUPALMetadata MD;
PALMetadata() {
- TM = createAMDGPUTargetMachine("amdgcn--amdpal", "gfx1010", "");
+ TM = createAMDGPUTargetMachine("amdgpu10.10--amdpal", "", "");
Ctx = std::make_unique<LLVMContext>();
M = std::make_unique<Module>("Module", *Ctx);
diff --git a/llvm/unittests/Target/AMDGPU/UniformityAnalysisTest.cpp b/llvm/unittests/Target/AMDGPU/UniformityAnalysisTest.cpp
index e61ef1d56c0a3..5b98e34c2a91e 100644
--- a/llvm/unittests/Target/AMDGPU/UniformityAnalysisTest.cpp
+++ b/llvm/unittests/Target/AMDGPU/UniformityAnalysisTest.cpp
@@ -55,7 +55,7 @@ TEST_F(AMDGPUTestBase, NewValueIsConservativelyDivergent) {
ASSERT_TRUE(F);
auto TM =
- createAMDGPUTargetMachine("amdgcn-amd-", "gfx1010", "+wavefrontsize32");
+ createAMDGPUTargetMachine("amdgpu10.10-amd-", "", "+wavefrontsize32");
ASSERT_TRUE(TM);
TargetTransformInfo TTI = TM->getTargetTransformInfo(*F);
``````````
</details>
https://github.com/llvm/llvm-project/pull/206486
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