[llvm-branch-commits] [llvm] c08ab39 - Revert "[AMDGPU] Capping max number of registers to function's occupancy budg…"

via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Thu Jun 18 07:08:56 PDT 2026


Author: Jan Patrick Lehr
Date: 2026-06-18T16:08:51+02:00
New Revision: c08ab393ffa2279cd95cd2176b3109e9dfa26780

URL: https://github.com/llvm/llvm-project/commit/c08ab393ffa2279cd95cd2176b3109e9dfa26780
DIFF: https://github.com/llvm/llvm-project/commit/c08ab393ffa2279cd95cd2176b3109e9dfa26780.diff

LOG: Revert "[AMDGPU] Capping max number of registers to function's occupancy budg…"

This reverts commit 567eeec75c26f4d0fca28659fb829b8b466539f2.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
    llvm/test/CodeGen/AMDGPU/agpr-register-count.ll
    llvm/test/CodeGen/AMDGPU/amdpal-metadata-agpr-register-count.ll
    llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
    llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
    llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation-direct-chain.ll
    llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation-indirect.ll
    llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation.ll
    llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
    llvm/test/CodeGen/AMDGPU/mcexpr-knownbits-assign-crash-gh-issue-110930.ll
    llvm/test/CodeGen/AMDGPU/object-linking-local-resources.ll

Removed: 
    llvm/test/CodeGen/AMDGPU/indirect-call-agpr-cap.ll
    llvm/test/CodeGen/AMDGPU/indirect-call-sgpr-cap.ll
    llvm/test/CodeGen/AMDGPU/indirect-call-vgpr-cap.ll


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
index dc125f1206d7a..1731b0463a099 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
@@ -13,7 +13,6 @@
 //===----------------------------------------------------------------------===//
 
 #include "AMDGPUMCResourceInfo.h"
-#include "GCNSubtarget.h"
 #include "SIMachineFunctionInfo.h"
 #include "Utils/AMDGPUBaseInfo.h"
 #include "llvm/ADT/StringRef.h"
@@ -317,35 +316,11 @@ void MCResourceInfo::gatherResourceInfo(
     } else {
       const MCExpr *SymRef = MCSymbolRefExpr::create(MaxSym, OutContext);
       MCSymbol *LocalNumSym = getSymbol(FnSym->getName(), RIK, OutContext);
-      const MCExpr *RegExpr = AMDGPUMCExpr::createMax(
+      const MCExpr *MaxWithLocal = AMDGPUMCExpr::createMax(
           {MCConstantExpr::create(numRegs, OutContext), SymRef}, OutContext);
-      if (RIK == RIK_NumVGPR) {
-        const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
-        unsigned MaxAllowedVGPRs =
-            ST.getMaxNumVectorRegs(MF.getFunction()).first;
-        RegExpr = AMDGPUMCExpr::createMin(
-            {MCConstantExpr::create(MaxAllowedVGPRs, OutContext), RegExpr},
-            OutContext);
-      } else if (RIK == RIK_NumAGPR) {
-        const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
-        unsigned MaxAllowedAGPRs =
-            ST.getMaxNumVectorRegs(MF.getFunction()).second;
-        RegExpr = AMDGPUMCExpr::createMin(
-            {MCConstantExpr::create(MaxAllowedAGPRs, OutContext), RegExpr},
-            OutContext);
-      } else if (RIK == RIK_NumSGPR) {
-        const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
-        unsigned MaxAllowedSGPRs = ST.getMaxNumSGPRs(MF.getFunction());
-        RegExpr = AMDGPUMCExpr::createMin(
-            {MCConstantExpr::create(MaxAllowedSGPRs, OutContext), RegExpr},
-            OutContext);
-      }
-      LocalNumSym->setVariableValue(RegExpr);
-      LLVM_DEBUG(
-          dbgs()
-          << "MCResUse:   " << LocalNumSym->getName()
-          << ": Indirect callee within, using module maximum unless it exceeds "
-             "the functions budget for VGPRs, AGPRs, or SGPRs \n");
+      LocalNumSym->setVariableValue(MaxWithLocal);
+      LLVM_DEBUG(dbgs() << "MCResUse:   " << LocalNumSym->getName()
+                        << ": Indirect callee within, using module maximum\n");
     }
   };
 

diff  --git a/llvm/test/CodeGen/AMDGPU/agpr-register-count.ll b/llvm/test/CodeGen/AMDGPU/agpr-register-count.ll
index 6f978895eb797..e0a65f43bdc9a 100644
--- a/llvm/test/CodeGen/AMDGPU/agpr-register-count.ll
+++ b/llvm/test/CodeGen/AMDGPU/agpr-register-count.ll
@@ -156,8 +156,8 @@ declare void @undef_func()
 ; GCN-LABEL: {{^}}kernel_call_undef_func:
 ; GCN:    .amdhsa_next_free_vgpr max(totalnumvgprs(.Lkernel_call_undef_func.num_agpr, .Lkernel_call_undef_func.num_vgpr), 1, 0)
 ; GFX90A: .amdhsa_accum_offset (((((alignto(max(1, .Lkernel_call_undef_func.num_vgpr), 4)/4)-1)&~65536)&63)+1)*4
-; GCN:    .set .Lkernel_call_undef_func.num_vgpr, min(128, max(32, amdgpu.max_num_vgpr))
-; GCN:    .set .Lkernel_call_undef_func.num_agpr, min(128, max(0, amdgpu.max_num_agpr))
+; GCN:    .set .Lkernel_call_undef_func.num_vgpr, max(32, amdgpu.max_num_vgpr)
+; GCN:    .set .Lkernel_call_undef_func.num_agpr, max(0, amdgpu.max_num_agpr)
 ; GCN:    NumVgprs: .Lkernel_call_undef_func.num_vgpr
 ; GCN:    NumAgprs: .Lkernel_call_undef_func.num_agpr
 ; GCN:    TotalNumVgprs: totalnumvgprs(.Lkernel_call_undef_func.num_agpr, .Lkernel_call_undef_func.num_vgpr)

diff  --git a/llvm/test/CodeGen/AMDGPU/amdpal-metadata-agpr-register-count.ll b/llvm/test/CodeGen/AMDGPU/amdpal-metadata-agpr-register-count.ll
index f4c5ec78d23a7..b05c65e73d734 100644
--- a/llvm/test/CodeGen/AMDGPU/amdpal-metadata-agpr-register-count.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdpal-metadata-agpr-register-count.ll
@@ -60,7 +60,7 @@ bb:
 declare void @undef_func()
 
 ; CHECK:      .type          kernel_call_undef_func
-; CHECK:      .set .Lkernel_call_undef_func.num_agpr, min(128, max(0, amdgpu.max_num_agpr))
+; CHECK:      .set .Lkernel_call_undef_func.num_agpr, max(0, amdgpu.max_num_agpr)
 ; CHECK:      NumAgprs: .Lkernel_call_undef_func.num_agpr
 ; CHECK:      .set amdgpu.max_num_agpr, 32
 define amdgpu_kernel void @kernel_call_undef_func() #0 {

diff  --git a/llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll b/llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
index 4ea5b04b12641..57784651591b8 100644
--- a/llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
+++ b/llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
@@ -547,17 +547,17 @@ define amdgpu_kernel void @f256() #256 {
 attributes #256 = { nounwind "amdgpu-flat-work-group-size"="256,256" }
 
 ; GCN-LABEL: {{^}}f512:
-; GFX9:             .set .Lf512.num_vgpr, min(128, max(128, amdgpu.max_num_vgpr))
-; GFX90A:           .set .Lf512.num_vgpr, min(128, max(128, amdgpu.max_num_vgpr))
-; GFX90A:           .set .Lf512.num_agpr, min(128, max(128, amdgpu.max_num_agpr))
-; GFX10WGP-WAVE32:  .set .Lf512.num_vgpr, min(256, max(256, amdgpu.max_num_vgpr))
-; GFX10WGP-WAVE64:  .set .Lf512.num_vgpr, min(256, max(256, amdgpu.max_num_vgpr))
-; GFX10CU-WAVE32:   .set .Lf512.num_vgpr, min(128, max(128, amdgpu.max_num_vgpr))
-; GFX10CU-WAVE64:   .set .Lf512.num_vgpr, min(128, max(128, amdgpu.max_num_vgpr))
-; GFX11WGP-WAVE32:  .set .Lf512.num_vgpr, min(256, max(256, amdgpu.max_num_vgpr))
-; GFX11WGP-WAVE64:  .set .Lf512.num_vgpr, min(256, max(256, amdgpu.max_num_vgpr))
-; GFX11CU-WAVE32:   .set .Lf512.num_vgpr, min(192, max(192, amdgpu.max_num_vgpr))
-; GFX11CU-WAVE64:   .set .Lf512.num_vgpr, min(192, max(192, amdgpu.max_num_vgpr))
+; GFX9:             .set .Lf512.num_vgpr, max(128, amdgpu.max_num_vgpr)
+; GFX90A:           .set .Lf512.num_vgpr, max(128, amdgpu.max_num_vgpr)
+; GFX90A:           .set .Lf512.num_agpr, max(128, amdgpu.max_num_agpr)
+; GFX10WGP-WAVE32:  .set .Lf512.num_vgpr, max(256, amdgpu.max_num_vgpr)
+; GFX10WGP-WAVE64:  .set .Lf512.num_vgpr, max(256, amdgpu.max_num_vgpr)
+; GFX10CU-WAVE32:   .set .Lf512.num_vgpr, max(128, amdgpu.max_num_vgpr)
+; GFX10CU-WAVE64:   .set .Lf512.num_vgpr, max(128, amdgpu.max_num_vgpr)
+; GFX11WGP-WAVE32:  .set .Lf512.num_vgpr, max(256, amdgpu.max_num_vgpr)
+; GFX11WGP-WAVE64:  .set .Lf512.num_vgpr, max(256, amdgpu.max_num_vgpr)
+; GFX11CU-WAVE32:   .set .Lf512.num_vgpr, max(192, amdgpu.max_num_vgpr)
+; GFX11CU-WAVE64:   .set .Lf512.num_vgpr, max(192, amdgpu.max_num_vgpr)
 ; GCN:              NumVgprs: .Lf512.num_vgpr
 ; GFX90A:           NumAgprs: .Lf512.num_agpr
 ; GFX90A:           TotalNumVgprs: totalnumvgprs(.Lf512.num_agpr, .Lf512.num_vgpr)
@@ -569,17 +569,17 @@ define amdgpu_kernel void @f512() #512 {
 attributes #512 = { nounwind "amdgpu-flat-work-group-size"="512,512" }
 
 ; GCN-LABEL: {{^}}f1024:
-; GFX9:             .set .Lf1024.num_vgpr, min(64, max(64, amdgpu.max_num_vgpr))
-; GFX90A:           .set .Lf1024.num_vgpr, min(64, max(64, amdgpu.max_num_vgpr))
-; GFX90A:           .set .Lf1024.num_agpr, min(64, max(64, amdgpu.max_num_agpr))
-; GFX10WGP-WAVE32:  .set .Lf1024.num_vgpr, min(128, max(128, amdgpu.max_num_vgpr))
-; GFX10WGP-WAVE64:  .set .Lf1024.num_vgpr, min(128, max(128, amdgpu.max_num_vgpr))
-; GFX10CU-WAVE32:   .set .Lf1024.num_vgpr, min(64, max(64, amdgpu.max_num_vgpr))
-; GFX10CU-WAVE64:   .set .Lf1024.num_vgpr, min(64, max(64, amdgpu.max_num_vgpr))
-; GFX11WGP-WAVE32:  .set .Lf1024.num_vgpr, min(192, max(192, amdgpu.max_num_vgpr))
-; GFX11WGP-WAVE64:  .set .Lf1024.num_vgpr, min(192, max(192, amdgpu.max_num_vgpr))
-; GFX11CU-WAVE32:   .set .Lf1024.num_vgpr, min(96, max(96, amdgpu.max_num_vgpr))
-; GFX11CU-WAVE64:   .set .Lf1024.num_vgpr, min(96, max(96, amdgpu.max_num_vgpr))
+; GFX9:             .set .Lf1024.num_vgpr, max(64, amdgpu.max_num_vgpr)
+; GFX90A:           .set .Lf1024.num_vgpr, max(64, amdgpu.max_num_vgpr)
+; GFX90A:           .set .Lf1024.num_agpr, max(64, amdgpu.max_num_agpr)
+; GFX10WGP-WAVE32:  .set .Lf1024.num_vgpr, max(128, amdgpu.max_num_vgpr)
+; GFX10WGP-WAVE64:  .set .Lf1024.num_vgpr, max(128, amdgpu.max_num_vgpr)
+; GFX10CU-WAVE32:   .set .Lf1024.num_vgpr, max(64, amdgpu.max_num_vgpr)
+; GFX10CU-WAVE64:   .set .Lf1024.num_vgpr, max(64, amdgpu.max_num_vgpr)
+; GFX11WGP-WAVE32:  .set .Lf1024.num_vgpr, max(192, amdgpu.max_num_vgpr)
+; GFX11WGP-WAVE64:  .set .Lf1024.num_vgpr, max(192, amdgpu.max_num_vgpr)
+; GFX11CU-WAVE32:   .set .Lf1024.num_vgpr, max(96, amdgpu.max_num_vgpr)
+; GFX11CU-WAVE64:   .set .Lf1024.num_vgpr, max(96, amdgpu.max_num_vgpr)
 ; GCN:              NumVgprs: .Lf1024.num_vgpr
 ; GFX90A:           NumAgprs: .Lf1024.num_agpr
 ; GFX90A:           TotalNumVgprs: totalnumvgprs(.Lf1024.num_agpr, .Lf1024.num_vgpr)

diff  --git a/llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll b/llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
index ad67d4ecc8e56..1d6299b5fc177 100644
--- a/llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
+++ b/llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
@@ -1,13 +1,13 @@
 ; RUN: sed 's/CODE_OBJECT_VERSION/400/g' %s | llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -enable-ipra=0 | FileCheck -check-prefixes=GCN,CI %s
 ; RUN: sed 's/CODE_OBJECT_VERSION/500/g' %s | llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -enable-ipra=0 | FileCheck -check-prefixes=GCN-V5 %s
 ; RUN: sed 's/CODE_OBJECT_VERSION/600/g' %s | llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -enable-ipra=0 | FileCheck -check-prefixes=GCN-V5 %s
-; RUN: sed 's/CODE_OBJECT_VERSION/400/g' %s | llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -enable-ipra=0 | FileCheck -check-prefixes=GCN,VI,VI-NOBUG,FIJI %s
-; RUN: sed 's/CODE_OBJECT_VERSION/400/g' %s | llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=iceland -enable-ipra=0 | FileCheck -check-prefixes=GCN,VI,VI-BUG,ICELAND %s
+; RUN: sed 's/CODE_OBJECT_VERSION/400/g' %s | llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -enable-ipra=0 | FileCheck -check-prefixes=GCN,VI,VI-NOBUG %s
+; RUN: sed 's/CODE_OBJECT_VERSION/400/g' %s | llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=iceland -enable-ipra=0 | FileCheck -check-prefixes=GCN,VI,VI-BUG %s
 ; RUN: sed 's/CODE_OBJECT_VERSION/400/g' %s | llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn-amd-amdhsa -enable-ipra=0 | FileCheck -check-prefixes=GCN,CI %s
 ; RUN: sed 's/CODE_OBJECT_VERSION/500/g' %s | llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn-amd-amdhsa -enable-ipra=0 | FileCheck -check-prefixes=GCN-V5 %s
 ; RUN: sed 's/CODE_OBJECT_VERSION/600/g' %s | llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn-amd-amdhsa -enable-ipra=0 | FileCheck -check-prefixes=GCN-V5 %s
-; RUN: sed 's/CODE_OBJECT_VERSION/400/g' %s | llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -enable-ipra=0 | FileCheck -check-prefixes=GCN,VI,VI-NOBUG,FIJI %s
-; RUN: sed 's/CODE_OBJECT_VERSION/400/g' %s | llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn-amd-amdhsa -mcpu=iceland -enable-ipra=0 | FileCheck -check-prefixes=GCN,VI,VI-BUG,ICELAND %s
+; RUN: sed 's/CODE_OBJECT_VERSION/400/g' %s | llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -enable-ipra=0 | FileCheck -check-prefixes=GCN,VI,VI-NOBUG %s
+; RUN: sed 's/CODE_OBJECT_VERSION/400/g' %s | llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn-amd-amdhsa -mcpu=iceland -enable-ipra=0 | FileCheck -check-prefixes=GCN,VI,VI-BUG %s
 
 ; Make sure to run a GPU with the SGPR allocation bug.
 
@@ -239,10 +239,8 @@ define amdgpu_kernel void @usage_direct_recursion(i32 %n) #0 {
 ; Make sure there's no assert when a sgpr96 is used.
 ; GCN-LABEL: {{^}}count_use_sgpr96_external_call
 ; GCN: ; sgpr96 s[{{[0-9]+}}:{{[0-9]+}}]
-; GCN: .set .Lcount_use_sgpr96_external_call.num_vgpr, min(64, max(0, amdgpu.max_num_vgpr))
-; FIJI: .set .Lcount_use_sgpr96_external_call.numbered_sgpr, min(102, max(33, amdgpu.max_num_sgpr))
-; ICELAND: .set .Lcount_use_sgpr96_external_call.numbered_sgpr, min(90, max(33, amdgpu.max_num_sgpr))
-; CI: .set .Lcount_use_sgpr96_external_call.numbered_sgpr, min(100, max(33, amdgpu.max_num_sgpr))
+; GCN: .set .Lcount_use_sgpr96_external_call.num_vgpr, max(0, amdgpu.max_num_vgpr)
+; GCN: .set .Lcount_use_sgpr96_external_call.numbered_sgpr, max(33, amdgpu.max_num_sgpr)
 ; CI: TotalNumSgprs: .Lcount_use_sgpr96_external_call.numbered_sgpr+4
 ; VI-BUG: TotalNumSgprs: 96
 ; GCN: NumVgprs: .Lcount_use_sgpr96_external_call.num_vgpr
@@ -256,10 +254,8 @@ entry:
 ; Make sure there's no assert when a sgpr160 is used.
 ; GCN-LABEL: {{^}}count_use_sgpr160_external_call
 ; GCN: ; sgpr160 s[{{[0-9]+}}:{{[0-9]+}}]
-; GCN: .set .Lcount_use_sgpr160_external_call.num_vgpr, min(64, max(0, amdgpu.max_num_vgpr))
-; FIJI: .set .Lcount_use_sgpr160_external_call.numbered_sgpr, min(102, max(33, amdgpu.max_num_sgpr))
-; ICELAND: .set .Lcount_use_sgpr160_external_call.numbered_sgpr, min(90, max(33, amdgpu.max_num_sgpr))
-; CI: .set .Lcount_use_sgpr160_external_call.numbered_sgpr, min(100, max(33, amdgpu.max_num_sgpr))
+; GCN: .set .Lcount_use_sgpr160_external_call.num_vgpr, max(0, amdgpu.max_num_vgpr)
+; GCN: .set .Lcount_use_sgpr160_external_call.numbered_sgpr, max(33, amdgpu.max_num_sgpr)
 ; CI: TotalNumSgprs: .Lcount_use_sgpr160_external_call.numbered_sgpr+4
 ; VI-BUG: TotalNumSgprs: 96
 ; GCN: NumVgprs: .Lcount_use_sgpr160_external_call.num_vgpr
@@ -273,10 +269,8 @@ entry:
 ; Make sure there's no assert when a vgpr160 is used.
 ; GCN-LABEL: {{^}}count_use_vgpr160_external_call
 ; GCN: ; vgpr160 v[{{[0-9]+}}:{{[0-9]+}}]
-; GCN: .set .Lcount_use_vgpr160_external_call.num_vgpr, min(64, max(5, amdgpu.max_num_vgpr))
-; FIJI: .set .Lcount_use_vgpr160_external_call.numbered_sgpr, min(102, max(33, amdgpu.max_num_sgpr))
-; ICELAND: .set .Lcount_use_vgpr160_external_call.numbered_sgpr, min(90, max(33, amdgpu.max_num_sgpr))
-; CI: .set .Lcount_use_vgpr160_external_call.numbered_sgpr, min(100, max(33, amdgpu.max_num_sgpr))
+; GCN: .set .Lcount_use_vgpr160_external_call.num_vgpr, max(5, amdgpu.max_num_vgpr)
+; GCN: .set .Lcount_use_vgpr160_external_call.numbered_sgpr, max(33, amdgpu.max_num_sgpr)
 ; CI: TotalNumSgprs: .Lcount_use_vgpr160_external_call.numbered_sgpr+4
 ; VI-BUG: TotalNumSgprs: 96
 ; GCN: NumVgprs: .Lcount_use_vgpr160_external_call.num_vgpr

diff  --git a/llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation-direct-chain.ll b/llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation-direct-chain.ll
index 5583ccf4085fb..7b01eec2698c3 100644
--- a/llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation-direct-chain.ll
+++ b/llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation-direct-chain.ll
@@ -14,22 +14,22 @@
 ; DVGPR:  .set .Lamdgpu_cs_main.num_vgpr, max(42, .Lgfx_func_a.num_vgpr)
 ; DVGPR:  .set .Lfunc.0.num_vgpr, max(11, .Lgfx_func_a.num_vgpr)
 ; DVGPR:  .set .Lfunc.1.num_vgpr, 82
-; DVGPR:  .set .Lfunc.2.num_vgpr, min(192, max(11, amdgpu.max_num_vgpr))
+; DVGPR:  .set .Lfunc.2.num_vgpr, max(11, amdgpu.max_num_vgpr)
 ; DVGPR:  .set .Lfunc.3.num_vgpr, 11
-; DVGPR:  .set .Lfunc.4.num_vgpr, min(192, max(82, amdgpu.max_num_vgpr))
+; DVGPR:  .set .Lfunc.4.num_vgpr, max(82, amdgpu.max_num_vgpr)
 ; DVGPR:  .set .Lretry_vgpr_alloc.num_vgpr, 11
 ; DVGPR:  .set .Lfirst_retry_wrapper.num_vgpr, 11
 ; DVGPR:  .set amdgpu.max_num_vgpr, 82
 
 ; NODVGPR:  .set .Lgfx_func_a.num_vgpr, 40
-; NODVGPR:  .set .Lamdgpu_cs_main.num_vgpr, min(192, max(42, amdgpu.max_num_vgpr))
-; NODVGPR:  .set .Lfunc.0.num_vgpr, min(192, max(11, amdgpu.max_num_vgpr))
-; NODVGPR:  .set .Lfunc.1.num_vgpr, min(192, max(82, amdgpu.max_num_vgpr))
-; NODVGPR:  .set .Lfunc.2.num_vgpr, min(192, max(11, amdgpu.max_num_vgpr))
-; NODVGPR:  .set .Lfunc.3.num_vgpr, min(192, max(11, amdgpu.max_num_vgpr))
-; NODVGPR:  .set .Lfunc.4.num_vgpr, min(192, max(82, amdgpu.max_num_vgpr))
-; NODVGPR:  .set .Lretry_vgpr_alloc.num_vgpr, min(192, max(11, amdgpu.max_num_vgpr))
-; NODVGPR:  .set .Lfirst_retry_wrapper.num_vgpr, min(192, max(11, amdgpu.max_num_vgpr))
+; NODVGPR:  .set .Lamdgpu_cs_main.num_vgpr, max(42, amdgpu.max_num_vgpr)
+; NODVGPR:  .set .Lfunc.0.num_vgpr, max(11, amdgpu.max_num_vgpr)
+; NODVGPR:  .set .Lfunc.1.num_vgpr, max(82, amdgpu.max_num_vgpr)
+; NODVGPR:  .set .Lfunc.2.num_vgpr, max(11, amdgpu.max_num_vgpr)
+; NODVGPR:  .set .Lfunc.3.num_vgpr, max(11, amdgpu.max_num_vgpr)
+; NODVGPR:  .set .Lfunc.4.num_vgpr, max(82, amdgpu.max_num_vgpr)
+; NODVGPR:  .set .Lretry_vgpr_alloc.num_vgpr, max(11, amdgpu.max_num_vgpr)
+; NODVGPR:  .set .Lfirst_retry_wrapper.num_vgpr, max(11, amdgpu.max_num_vgpr)
 ; NODVGPR:  .set amdgpu.max_num_vgpr, 82
 
 ; DVGPR:  - .hardware_stages:

diff  --git a/llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation-indirect.ll b/llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation-indirect.ll
index b71dcc956d90f..f9cf887ac668b 100644
--- a/llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation-indirect.ll
+++ b/llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation-indirect.ll
@@ -15,9 +15,9 @@
 
 ; NODVGPR:  .set .Lgfx_func_a.num_vgpr, 40
 ; NODVGPR:  .set .Lgfx_func_b.num_vgpr, 80
-; NODVGPR:  .set .Lfunc_with_indirect_call.num_vgpr, min(192, max(11, amdgpu.max_num_vgpr))
-; NODVGPR:  .set .Lfunc_direct_only.num_vgpr, min(192, max(11, amdgpu.max_num_vgpr))
-; NODVGPR:  .set .Lfunc_chain_only.num_vgpr, min(192, max(11, amdgpu.max_num_vgpr))
+; NODVGPR:  .set .Lfunc_with_indirect_call.num_vgpr, max(11, amdgpu.max_num_vgpr)
+; NODVGPR:  .set .Lfunc_direct_only.num_vgpr, max(11, amdgpu.max_num_vgpr)
+; NODVGPR:  .set .Lfunc_chain_only.num_vgpr, max(11, amdgpu.max_num_vgpr)
 ; NODVGPR:  .set amdgpu.max_num_vgpr, 80
 
 define amdgpu_gfx void @gfx_func_a() #0 {

diff  --git a/llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation.ll b/llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation.ll
index e8da866d2fa6e..7001e23f7002d 100644
--- a/llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation.ll
+++ b/llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation.ll
@@ -27,14 +27,14 @@
 ; NODVGPR:  .set .Lgfx_func_a.num_vgpr, 40
 ; NODVGPR:  .set .Lgfx_func_b2.num_vgpr, 80
 ; NODVGPR:  .set .Lgfx_func_b.num_vgpr, max(61, .Lgfx_func_b2.num_vgpr)
-; NODVGPR:  .set .Lamdgpu_cs_main.num_vgpr, min(192, max(42, amdgpu.max_num_vgpr))
-; NODVGPR:  .set .Lfunc.0.num_vgpr, min(192, max(13, amdgpu.max_num_vgpr))
-; NODVGPR:  .set .Lfunc.1.num_vgpr, min(192, max(14, amdgpu.max_num_vgpr))
-; NODVGPR:  .set .Lfunc.2.num_vgpr, min(192, max(16, amdgpu.max_num_vgpr))
-; NODVGPR:  .set .Lfunc.3.num_vgpr, min(192, max(15, amdgpu.max_num_vgpr))
-; NODVGPR:  .set .Lfunc.4.num_vgpr, min(192, max(100, amdgpu.max_num_vgpr))
-; NODVGPR:  .set .Lretry_vgpr_alloc.num_vgpr, min(192, max(11, amdgpu.max_num_vgpr))
-; NODVGPR:  .set .Lfirst_retry_wrapper.num_vgpr, min(192, max(11, amdgpu.max_num_vgpr))
+; NODVGPR:  .set .Lamdgpu_cs_main.num_vgpr, max(42, amdgpu.max_num_vgpr)
+; NODVGPR:  .set .Lfunc.0.num_vgpr, max(13, amdgpu.max_num_vgpr)
+; NODVGPR:  .set .Lfunc.1.num_vgpr, max(14, amdgpu.max_num_vgpr)
+; NODVGPR:  .set .Lfunc.2.num_vgpr, max(16, amdgpu.max_num_vgpr)
+; NODVGPR:  .set .Lfunc.3.num_vgpr, max(15, amdgpu.max_num_vgpr)
+; NODVGPR:  .set .Lfunc.4.num_vgpr, max(100, amdgpu.max_num_vgpr)
+; NODVGPR:  .set .Lretry_vgpr_alloc.num_vgpr, max(11, amdgpu.max_num_vgpr)
+; NODVGPR:  .set .Lfirst_retry_wrapper.num_vgpr, max(11, amdgpu.max_num_vgpr)
 ; NODVGPR:  .set amdgpu.max_num_vgpr, 100
 
 ; DVGPR:  - .hardware_stages:

diff  --git a/llvm/test/CodeGen/AMDGPU/function-resource-usage.ll b/llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
index 5c5bc72b94eb6..2c9778e1db5e5 100644
--- a/llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
+++ b/llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
@@ -356,9 +356,9 @@ define amdgpu_kernel void @multi_call_use_use_stack() #0 {
 declare void @external() #0
 
 ; GCN-LABEL: {{^}}multi_call_with_external:
-; GCN:	.set .Lmulti_call_with_external.num_vgpr, min(64, max(41, amdgpu.max_num_vgpr))
-; GCN:	.set .Lmulti_call_with_external.num_agpr, min(0, max(0, amdgpu.max_num_agpr))
-; GCN:	.set .Lmulti_call_with_external.numbered_sgpr, min(102, max(52, amdgpu.max_num_sgpr))
+; GCN:	.set .Lmulti_call_with_external.num_vgpr, max(41, amdgpu.max_num_vgpr)
+; GCN:	.set .Lmulti_call_with_external.num_agpr, max(0, amdgpu.max_num_agpr)
+; GCN:	.set .Lmulti_call_with_external.numbered_sgpr, max(52, amdgpu.max_num_sgpr)
 ; GCN:	.set .Lmulti_call_with_external.private_seg_size, 0+max(.Luse_stack0.private_seg_size, .Luse_stack1.private_seg_size)
 ; GCN:	.set .Lmulti_call_with_external.uses_vcc, 1
 ; GCN:	.set .Lmulti_call_with_external.uses_flat_scratch, 1
@@ -376,9 +376,9 @@ define amdgpu_kernel void @multi_call_with_external() #0 {
 }
 
 ; GCN-LABEL: {{^}}multi_call_with_external_and_duplicates:
-; GCN:	.set .Lmulti_call_with_external_and_duplicates.num_vgpr, min(64, max(41, amdgpu.max_num_vgpr))
-; GCN:	.set .Lmulti_call_with_external_and_duplicates.num_agpr, min(0, max(0, amdgpu.max_num_agpr))
-; GCN:	.set .Lmulti_call_with_external_and_duplicates.numbered_sgpr, min(102, max(54, amdgpu.max_num_sgpr))
+; GCN:	.set .Lmulti_call_with_external_and_duplicates.num_vgpr, max(41, amdgpu.max_num_vgpr)
+; GCN:	.set .Lmulti_call_with_external_and_duplicates.num_agpr, max(0, amdgpu.max_num_agpr)
+; GCN:	.set .Lmulti_call_with_external_and_duplicates.numbered_sgpr, max(54, amdgpu.max_num_sgpr)
 ; GCN:	.set .Lmulti_call_with_external_and_duplicates.private_seg_size, 0+max(.Luse_stack0.private_seg_size, .Luse_stack1.private_seg_size)
 ; GCN:	.set .Lmulti_call_with_external_and_duplicates.uses_vcc, 1
 ; GCN:	.set .Lmulti_call_with_external_and_duplicates.uses_flat_scratch, 1
@@ -399,9 +399,9 @@ define amdgpu_kernel void @multi_call_with_external_and_duplicates() #0 {
 }
 
 ; GCN-LABEL: {{^}}usage_external:
-; GCN:	.set .Lusage_external.num_vgpr, min(64, max(32, amdgpu.max_num_vgpr))
-; GCN:	.set .Lusage_external.num_agpr, min(0, max(0, amdgpu.max_num_agpr))
-; GCN:	.set .Lusage_external.numbered_sgpr, min(102, max(33, amdgpu.max_num_sgpr))
+; GCN:	.set .Lusage_external.num_vgpr, max(32, amdgpu.max_num_vgpr)
+; GCN:	.set .Lusage_external.num_agpr, max(0, amdgpu.max_num_agpr)
+; GCN:	.set .Lusage_external.numbered_sgpr, max(33, amdgpu.max_num_sgpr)
 ; GCN:	.set .Lusage_external.private_seg_size, 0
 ; GCN:	.set .Lusage_external.uses_vcc, 1
 ; GCN:	.set .Lusage_external.uses_flat_scratch, 1
@@ -419,9 +419,9 @@ define amdgpu_kernel void @usage_external() #0 {
 declare void @external_recurse() #2
 
 ; GCN-LABEL: {{^}}usage_external_recurse:
-; GCN:	.set .Lusage_external_recurse.num_vgpr, min(64, max(32, amdgpu.max_num_vgpr))
-; GCN:	.set .Lusage_external_recurse.num_agpr, min(0, max(0, amdgpu.max_num_agpr))
-; GCN:	.set .Lusage_external_recurse.numbered_sgpr, min(102, max(33, amdgpu.max_num_sgpr))
+; GCN:	.set .Lusage_external_recurse.num_vgpr, max(32, amdgpu.max_num_vgpr)
+; GCN:	.set .Lusage_external_recurse.num_agpr, max(0, amdgpu.max_num_agpr)
+; GCN:	.set .Lusage_external_recurse.numbered_sgpr, max(33, amdgpu.max_num_sgpr)
 ; GCN:	.set .Lusage_external_recurse.private_seg_size, 0
 ; GCN:	.set .Lusage_external_recurse.uses_vcc, 1
 ; GCN:	.set .Lusage_external_recurse.uses_flat_scratch, 1
@@ -614,9 +614,9 @@ define amdgpu_kernel void @multi_call_with_multi_stage_recurse(i32 %n) #0 {
 
 ; Make sure there's no assert when a sgpr96 is used.
 ; GCN-LABEL: {{^}}count_use_sgpr96_external_call
-; GCN:	.set .Lcount_use_sgpr96_external_call.num_vgpr, min(64, max(32, amdgpu.max_num_vgpr))
-; GCN:	.set .Lcount_use_sgpr96_external_call.num_agpr, min(0, max(0, amdgpu.max_num_agpr))
-; GCN:	.set .Lcount_use_sgpr96_external_call.numbered_sgpr, min(102, max(33, amdgpu.max_num_sgpr))
+; GCN:	.set .Lcount_use_sgpr96_external_call.num_vgpr, max(32, amdgpu.max_num_vgpr)
+; GCN:	.set .Lcount_use_sgpr96_external_call.num_agpr, max(0, amdgpu.max_num_agpr)
+; GCN:	.set .Lcount_use_sgpr96_external_call.numbered_sgpr, max(33, amdgpu.max_num_sgpr)
 ; GCN:	.set .Lcount_use_sgpr96_external_call.private_seg_size, 0
 ; GCN:	.set .Lcount_use_sgpr96_external_call.uses_vcc, 1
 ; GCN:	.set .Lcount_use_sgpr96_external_call.uses_flat_scratch, 1
@@ -635,9 +635,9 @@ entry:
 
 ; Make sure there's no assert when a sgpr160 is used.
 ; GCN-LABEL: {{^}}count_use_sgpr160_external_call
-; GCN:	.set .Lcount_use_sgpr160_external_call.num_vgpr, min(64, max(32, amdgpu.max_num_vgpr))
-; GCN:	.set .Lcount_use_sgpr160_external_call.num_agpr, min(0, max(0, amdgpu.max_num_agpr))
-; GCN:	.set .Lcount_use_sgpr160_external_call.numbered_sgpr, min(102, max(33, amdgpu.max_num_sgpr))
+; GCN:	.set .Lcount_use_sgpr160_external_call.num_vgpr, max(32, amdgpu.max_num_vgpr)
+; GCN:	.set .Lcount_use_sgpr160_external_call.num_agpr, max(0, amdgpu.max_num_agpr)
+; GCN:	.set .Lcount_use_sgpr160_external_call.numbered_sgpr, max(33, amdgpu.max_num_sgpr)
 ; GCN:	.set .Lcount_use_sgpr160_external_call.private_seg_size, 0
 ; GCN:	.set .Lcount_use_sgpr160_external_call.uses_vcc, 1
 ; GCN:	.set .Lcount_use_sgpr160_external_call.uses_flat_scratch, 1
@@ -656,9 +656,9 @@ entry:
 
 ; Make sure there's no assert when a vgpr160 is used.
 ; GCN-LABEL: {{^}}count_use_vgpr160_external_call
-; GCN:	.set .Lcount_use_vgpr160_external_call.num_vgpr, min(64, max(32, amdgpu.max_num_vgpr))
-; GCN:	.set .Lcount_use_vgpr160_external_call.num_agpr, min(0, max(0, amdgpu.max_num_agpr))
-; GCN:	.set .Lcount_use_vgpr160_external_call.numbered_sgpr, min(102, max(33, amdgpu.max_num_sgpr))
+; GCN:	.set .Lcount_use_vgpr160_external_call.num_vgpr, max(32, amdgpu.max_num_vgpr)
+; GCN:	.set .Lcount_use_vgpr160_external_call.num_agpr, max(0, amdgpu.max_num_agpr)
+; GCN:	.set .Lcount_use_vgpr160_external_call.numbered_sgpr, max(33, amdgpu.max_num_sgpr)
 ; GCN:	.set .Lcount_use_vgpr160_external_call.private_seg_size, 0
 ; GCN:	.set .Lcount_use_vgpr160_external_call.uses_vcc, 1
 ; GCN:	.set .Lcount_use_vgpr160_external_call.uses_flat_scratch, 1

diff  --git a/llvm/test/CodeGen/AMDGPU/indirect-call-agpr-cap.ll b/llvm/test/CodeGen/AMDGPU/indirect-call-agpr-cap.ll
deleted file mode 100644
index f61ca50546db3..0000000000000
--- a/llvm/test/CodeGen/AMDGPU/indirect-call-agpr-cap.ll
+++ /dev/null
@@ -1,57 +0,0 @@
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 < %s | FileCheck %s --check-prefixes=CHECK
-
-; A kernel that makes an indirect call is assigned the module-wide maximum
-; register usage (any function is a potential callee). When the kernel's own
-; AGPR budget is lowered below the largestsibling function's explicit AGPR  
-; usage, the reported/emitted AGPR count must be clamped to what the kernel 
-; can actually allocate
-
-declare void @extern_fn()   ; forces HasIndirectCall path
-define void @big_agpr_user() #1 {
-    call void asm sideeffect "","~{a125}"() #1
-    ret void
-}
-
-define internal void @small_callee() {
-    ret void
-}
-
-; CHECK: .set .Lkernel_indirect_attributed.num_agpr, min(40, max(0, amdgpu.max_num_agpr))
-; CHECK: .set .Lkernel_indirect_attributed.has_indirect_call, 1
-define amdgpu_kernel void @kernel_indirect_attributed() #0 {
-    call void @extern_fn()
-    ret void
-}
-
-; CHECK: .set .Lkernel_indirect_unattributed.num_agpr, min(64, max(0, amdgpu.max_num_agpr))
-; CHECK: .set .Lkernel_indirect_unattributed.has_indirect_call, 1
-define amdgpu_kernel void @kernel_indirect_unattributed() { 
-    call void @extern_fn()
-    ret void
-}
-
-; CHECK: .set .Lkernel_direct_only.num_agpr, max(0, .Lsmall_callee.num_agpr)
-; CHECK: .set .Lkernel_direct_only.has_indirect_call, or(0, .Lsmall_callee.has_indirect_call)
-define amdgpu_kernel void @kernel_direct_only() {
-    call void @small_callee()
-    ret void
-}
-
-
-attributes #0 = {"amdgpu-num-vgpr"="40"}
-attributes #1 = {nounwind noinline norecurse}
-
-; CHECK: .set amdgpu.max_num_agpr, 126
-
-; CHECK: .agpr_count: 40
-; CHECK-LABEL: .symbol: kernel_indirect_attributed.kd
-; CHECK: .vgpr_count: 72
-
-; CHECK: .agpr_count: 64
-; CHECK-LABEL:  .symbol: kernel_indirect_unattributed.kd
-; CHECK: .vgpr_count: 96
-
-; CHECK: .agpr_count: 0
-; CHECK-LABEL: .symbol: kernel_direct_only.kd
-; CHECK: .vgpr_count: 32
-

diff  --git a/llvm/test/CodeGen/AMDGPU/indirect-call-sgpr-cap.ll b/llvm/test/CodeGen/AMDGPU/indirect-call-sgpr-cap.ll
deleted file mode 100644
index fe0b19e142c23..0000000000000
--- a/llvm/test/CodeGen/AMDGPU/indirect-call-sgpr-cap.ll
+++ /dev/null
@@ -1,35 +0,0 @@
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 -enable-ipra=0 < %s | FileCheck -check-prefix=CHECK %s
-
-; A kernel that makes an indirect call is assigned the module-wide maximum
-; register usage (any function is a potential callee). When the kernel's own
-; SGPR budget is lowered (here via "amdgpu-num-sgpr") below the largest
-; sibling function's explicit SGPR usage, the reported/emitted SGPR count must
-; be clamped to what the kernel can actually allocate
-; (ST.getMaxNumSGPRs() + extra SGPRs) instead of the inflated module maximum.
-;
-; For gfx942 the reserved SGPR count is 6 (FLAT_SCRATCH, XNACK, VCC), so with
-; "amdgpu-num-sgpr"="40" the budget is getMaxNumSGPRs = min(40 - 6, 102) = 34
-; explicit SGPRs, i.e. a total of 34 + 6 = 40 SGPRs. Without the cap the kernel
-; would instead report the module maximum of 100 + 6 = 106.
-
-; CHECK: .set .Luse_100_sgpr.numbered_sgpr, 100
-define void @use_100_sgpr() #1 {
-  call void asm sideeffect "", "~{s99}"() #0
-  ret void
-}
-
-; CHECK: .set .Lindirect_call_low_sgpr_budget.has_indirect_call, 1
-define amdgpu_kernel void @indirect_call_low_sgpr_budget(ptr %fptr) #0 {
-  call void %fptr()
-  ret void
-}
-
-; The module maximum still reflects the large sibling function.
-; CHECK: .set amdgpu.max_num_sgpr, 100
-
-; CHECK: amdhsa.kernels:
-; CHECK-LABEL: .name: indirect_call_low_sgpr_budget
-; CHECK: .sgpr_count: 40
-
-attributes #0 = { nounwind noinline norecurse "amdgpu-num-sgpr"="40" }
-attributes #1 = { nounwind noinline norecurse }

diff  --git a/llvm/test/CodeGen/AMDGPU/indirect-call-vgpr-cap.ll b/llvm/test/CodeGen/AMDGPU/indirect-call-vgpr-cap.ll
deleted file mode 100644
index b6f3d28f134af..0000000000000
--- a/llvm/test/CodeGen/AMDGPU/indirect-call-vgpr-cap.ll
+++ /dev/null
@@ -1,54 +0,0 @@
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 < %s | FileCheck %s --check-prefixes=CHECK
-
-; A kernel that makes an indirect call is assigned the module-wide maximum
-; register usage (any function is a potential callee). When the kernel's own
-; VGPR budget is lowered below the largestsibling function's explicit VGPR  
-; usage, the reported/emitted VGPR count must be clamped to what the kernel 
-; can actually allocate
-
-declare void @extern_fn()   ; forces HasIndirectCall path
-define void @big_vgpr_user() #1 {
-    call void asm sideeffect "","~{v125}"() #1
-    ret void
-}
-
-define internal void @small_callee() {
-    ret void
-}
-
-; CHECK: .set .Lkernel_indirect_attributed.num_vgpr, min(40, max(32, amdgpu.max_num_vgpr))
-; CHECK: .set .Lkernel_indirect_attributed.has_indirect_call, 1
-define amdgpu_kernel void @kernel_indirect_attributed() #0 { 
-    call void @extern_fn()
-    ret void
-}
-
-; CHECK: .set .Lkernel_indirect_unattributed.num_vgpr, min(64, max(32, amdgpu.max_num_vgpr))
-; CHECK: .set .Lkernel_indirect_unattributed.has_indirect_call, 1
-define amdgpu_kernel void @kernel_indirect_unattributed() { 
-    call void @extern_fn()
-    ret void
-}
-
-; CHECK: .set .Lkernel_direct_only.num_vgpr, max(32, .Lsmall_callee.num_vgpr)
-; CHECK: .set .Lkernel_direct_only.has_indirect_call, or(0, .Lsmall_callee.has_indirect_call)
-define amdgpu_kernel void @kernel_direct_only() {
-    call void @small_callee()
-    ret void
-}
-
-
-attributes #0 = {"amdgpu-num-vgpr"="40"}
-attributes #1 = {nounwind noinline norecurse "amdgpu-agpr-alloc"="0"}
-
-; CHECK: .set amdgpu.max_num_vgpr, 126
-
-; CHECK-LABEL: .symbol: kernel_indirect_attributed.kd
-; CHECK: .vgpr_count: 40
-
-; CHECK-LABEL:  .symbol: kernel_indirect_unattributed.kd
-; CHECK: .vgpr_count: 64
-
-; CHECK-LABEL: .symbol: kernel_direct_only.kd
-; CHECK: .vgpr_count: 32
-

diff  --git a/llvm/test/CodeGen/AMDGPU/mcexpr-knownbits-assign-crash-gh-issue-110930.ll b/llvm/test/CodeGen/AMDGPU/mcexpr-knownbits-assign-crash-gh-issue-110930.ll
index 297ff2dc2a344..cd9a18571815e 100644
--- a/llvm/test/CodeGen/AMDGPU/mcexpr-knownbits-assign-crash-gh-issue-110930.ll
+++ b/llvm/test/CodeGen/AMDGPU/mcexpr-knownbits-assign-crash-gh-issue-110930.ll
@@ -6,9 +6,9 @@
 ; use-after-free if the assignment operator invokes a DenseMap growth.
 
 ; CHECK-LABEL: I_Quit:
-; CHECK: .set .LI_Quit.num_vgpr, min(128, max(41, amdgpu.max_num_vgpr))
-; CHECK: .set .LI_Quit.num_agpr, min(0, max(0, amdgpu.max_num_agpr))
-; CHECK: .set .LI_Quit.numbered_sgpr, min(106, max(56, amdgpu.max_num_sgpr))
+; CHECK: .set .LI_Quit.num_vgpr, max(41, amdgpu.max_num_vgpr)
+; CHECK: .set .LI_Quit.num_agpr, max(0, amdgpu.max_num_agpr)
+; CHECK: .set .LI_Quit.numbered_sgpr, max(56, amdgpu.max_num_sgpr)
 ; CHECK: .set .LI_Quit.private_seg_size, 16
 ; CHECK: .set .LI_Quit.uses_vcc, 1
 ; CHECK: .set .LI_Quit.uses_flat_scratch, 1
@@ -78,9 +78,9 @@ define void @P_SetThingPosition() {
 }
 
 ; CHECK-LABEL: P_SetupPsprites:
-; CHECK: .set .LP_SetupPsprites.num_vgpr, min(128, max(41, amdgpu.max_num_vgpr))
-; CHECK: .set .LP_SetupPsprites.num_agpr, min(0, max(0, amdgpu.max_num_agpr))
-; CHECK: .set .LP_SetupPsprites.numbered_sgpr, min(106, max(56, amdgpu.max_num_sgpr))
+; CHECK: .set .LP_SetupPsprites.num_vgpr, max(41, amdgpu.max_num_vgpr)
+; CHECK: .set .LP_SetupPsprites.num_agpr, max(0, amdgpu.max_num_agpr)
+; CHECK: .set .LP_SetupPsprites.numbered_sgpr, max(56, amdgpu.max_num_sgpr)
 ; CHECK: .set .LP_SetupPsprites.private_seg_size, 16
 ; CHECK: .set .LP_SetupPsprites.uses_vcc, 1
 ; CHECK: .set .LP_SetupPsprites.uses_flat_scratch, 1
@@ -126,9 +126,9 @@ define void @P_SpawnPlayer() {
 }
 
 ; CHECK-LABEL: I_Error:
-; CHECK: .set .LI_Error.num_vgpr, min(128, max(41, amdgpu.max_num_vgpr))
-; CHECK: .set .LI_Error.num_agpr, min(0, max(0, amdgpu.max_num_agpr))
-; CHECK: .set .LI_Error.numbered_sgpr, min(106, max(56, amdgpu.max_num_sgpr))
+; CHECK: .set .LI_Error.num_vgpr, max(41, amdgpu.max_num_vgpr)
+; CHECK: .set .LI_Error.num_agpr, max(0, amdgpu.max_num_agpr)
+; CHECK: .set .LI_Error.numbered_sgpr, max(56, amdgpu.max_num_sgpr)
 ; CHECK: .set .LI_Error.private_seg_size, 16
 ; CHECK: .set .LI_Error.uses_vcc, 1
 ; CHECK: .set .LI_Error.uses_flat_scratch, 1

diff  --git a/llvm/test/CodeGen/AMDGPU/object-linking-local-resources.ll b/llvm/test/CodeGen/AMDGPU/object-linking-local-resources.ll
index 066c8d893d719..95214bcf7c06d 100644
--- a/llvm/test/CodeGen/AMDGPU/object-linking-local-resources.ll
+++ b/llvm/test/CodeGen/AMDGPU/object-linking-local-resources.ll
@@ -28,9 +28,9 @@ define amdgpu_kernel void @my_kernel(ptr %fptr) {
 ; COM: callee" path. Register/stack-size symbols include the module-level
 ; COM: sinks; boolean flags are all forced to 1; HasIndirectCall is set too
 ; COM: (IsIndirect covers calls to declarations).
-; DEFAULT:       .set .Lcalls_extern.num_vgpr, min(64, max({{[0-9]+}}, amdgpu.max_num_vgpr))
-; DEFAULT:       .set .Lcalls_extern.num_agpr, min(0, max({{[0-9]+}}, amdgpu.max_num_agpr))
-; DEFAULT:       .set .Lcalls_extern.numbered_sgpr, min({{[0-9]+}}{{[0-9]+}}, max({{[0-9]+}}, amdgpu.max_num_sgpr))
+; DEFAULT:       .set .Lcalls_extern.num_vgpr, max({{[0-9]+}}, amdgpu.max_num_vgpr)
+; DEFAULT:       .set .Lcalls_extern.num_agpr, max({{[0-9]+}}, amdgpu.max_num_agpr)
+; DEFAULT:       .set .Lcalls_extern.numbered_sgpr, max({{[0-9]+}}, amdgpu.max_num_sgpr)
 ; DEFAULT:       .set .Lcalls_extern.num_named_barrier, max({{[0-9]+}}, amdgpu.max_num_named_barrier)
 ; DEFAULT:       .set .Lcalls_extern.uses_vcc, 1
 ; DEFAULT:       .set .Lcalls_extern.uses_flat_scratch, 1


        


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